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drm/amdgpu/soc21: fix xclk for APUs

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The reference clock is supposed to be 100Mhz, but it
appears to actually be slightly lower (99.81Mhz).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14451
Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2026-01-16 17:33:05 -05:00
parent 05762d9c7d
commit 637fee3954
1 changed files with 7 additions and 1 deletions
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8
drivers/gpu/drm/amd/amdgpu/soc21.c
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@ -256,7 +256,13 @@ static u32 soc21_get_config_memsize(struct amdgpu_device *adev)
static u32 soc21_get_xclk(struct amdgpu_device *adev)
{
return adev->clock.spll.reference_freq;
u32 reference_clock = adev->clock.spll.reference_freq;
/* reference clock is actually 99.81 Mhz rather than 100 Mhz */
if ((adev->flags & AMD_IS_APU) && reference_clock == 10000)
return 9981;
return reference_clock;
}