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Merge branch 'arm/smmu/updates' into next

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* arm/smmu/updates:
  iommu/arm-smmu: disable PRR on SM8250
  iommu/arm-smmu-v3: Revert vmaster in the error path
  iommu/io-pgtable-arm: Remove unused macro iopte_prot
This commit is contained in:
Will Deacon 2025-07-24 11:18:28 +01:00
commit b9e6e8ae0a
3 changed files with 6 additions and 11 deletions
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7
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
View File

@ -2906,8 +2906,8 @@ int arm_smmu_attach_prepare(struct arm_smmu_attach_state *state,
master_domain = kzalloc(sizeof(*master_domain), GFP_KERNEL);
if (!master_domain) {
kfree(state->vmaster);
return -ENOMEM;
ret = -ENOMEM;
goto err_free_vmaster;
}
master_domain->domain = new_domain;
master_domain->master = master;
@ -2941,7 +2941,6 @@ int arm_smmu_attach_prepare(struct arm_smmu_attach_state *state,
!arm_smmu_master_canwbs(master)) {
spin_unlock_irqrestore(&smmu_domain->devices_lock,
flags);
kfree(state->vmaster);
ret = -EINVAL;
goto err_iopf;
}
@ -2967,6 +2966,8 @@ int arm_smmu_attach_prepare(struct arm_smmu_attach_state *state,
arm_smmu_disable_iopf(master, master_domain);
err_free_master_domain:
kfree(master_domain);
err_free_vmaster:
kfree(state->vmaster);
return ret;
}

3
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
View File

@ -355,7 +355,8 @@ static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain,
priv->set_prr_addr = NULL;
if (of_device_is_compatible(np, "qcom,smmu-500") &&
of_device_is_compatible(np, "qcom,adreno-smmu")) {
!of_device_is_compatible(np, "qcom,sm8250-smmu-500") &&
of_device_is_compatible(np, "qcom,adreno-smmu")) {
priv->set_prr_bit = qcom_adreno_smmu_set_prr_bit;
priv->set_prr_addr = qcom_adreno_smmu_set_prr_addr;
}

7
drivers/iommu/io-pgtable-arm.c
View File

@ -85,11 +85,6 @@
#define ARM_LPAE_PTE_NS (((arm_lpae_iopte)1) << 5)
#define ARM_LPAE_PTE_VALID (((arm_lpae_iopte)1) << 0)
#define ARM_LPAE_PTE_ATTR_LO_MASK (((arm_lpae_iopte)0x3ff) << 2)
/* Ignore the contiguous bit for block splitting */
#define ARM_LPAE_PTE_ATTR_HI_MASK (ARM_LPAE_PTE_XN | ARM_LPAE_PTE_DBM)
#define ARM_LPAE_PTE_ATTR_MASK (ARM_LPAE_PTE_ATTR_LO_MASK | \
ARM_LPAE_PTE_ATTR_HI_MASK)
/* Software bit for solving coherency races */
#define ARM_LPAE_PTE_SW_SYNC (((arm_lpae_iopte)1) << 55)
@ -155,8 +150,6 @@
#define iopte_type(pte) \
(((pte) >> ARM_LPAE_PTE_TYPE_SHIFT) & ARM_LPAE_PTE_TYPE_MASK)
#define iopte_prot(pte) ((pte) & ARM_LPAE_PTE_ATTR_MASK)
#define iopte_writeable_dirty(pte) \
(((pte) & ARM_LPAE_PTE_AP_WR_CLEAN_MASK) == ARM_LPAE_PTE_DBM)