github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-03 20:14:06 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

SoCFPGA DTS updates for v6.18

Browse Source 
- Add and enable gmac for Agilex5
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmi+VWEACgkQGZQEC4Gj
 KPSu/g//ZH9x+Tyz4jru4H7BzmR/yZhHtOpoUY2Lh9CxgAAOCRRqs0mq6blkmtSQ
 WjUl7Vdi1NSarcgoBJ6875rSGI0Nx2t8JQ1MHUEYHI/rtXETCJIv4zO1f/QfVt9L
 Rk2smjyuEzGR07Yw3DQdxK1BKLtNF+/BKC5lSWrWEi5bvESgRFGJZILiBL0lAd8+
 XXIQv+xn+IvF059VmKKmeWGWV3HQ4trWujiBQ/cFc8MFUQYfl2/4UE9MwgSaaaLq
 7768tjKZzMxiZkvoHllk94WWqhe8dRREyUMv6k3Y94xl9B0riNiVEjQgRXGkdLT9
 A2sHTK2V6Eq2iC8wzp+O2mSlflHNwnS8cgSlVLq/RGpGnYSznx9HhmBvk83+j/in
 VT48afOFvhreg3zvo9MQt8K2EH3d8rwMsguMmcqvmSX3f0ARW4D+q4kAHUyVwfh5
 sx7lY0JWOLS1dsmLkXrakbrZewoJBBIiBc9h6qE12q0OzqYKyC4M5EOOgsZNH/Oi
 ZuptYt14/S9OMA2LlCXoSGLXbuufSL10ui2IpeHuql9frNqiL9QxIHEM4mVhkx39
 oLUEsL0TwzGjSyimRBWwpmmrn1LkHtC2AAhIEEJmf7ZPkXQOn29Qpr2qlhs6AqIm
 0YBcs2Gb9+lLKr1Bx/60NOe1g/QPZp5EtTGif5Mm76JVfmw4gfY=
 =OUxZ
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmjIDlAACgkQmmx57+YA
 GNnFTg/9GichEpfSjI+9TVhOKhIBMy7/omzJoEi5qqIclzvo2Vsx415m/RegDqYI
 2e+M+DoEzChMe33TNAoiymHnw8a5Gxr9Esa2SSpQOrXQVrnXraCpikGnCsLO8lNH
 of+wXIY75iqYQ5H4bZ+B9qZYkOErTiI6cV/qda14qgXyTxLJ5dovwmQokQ1RSr8X
 8CZj++W+ANmuIDKCZnsAxhDV9ftoMxzijXnx8VZkV22M0HOxnfsKh0nRYTZ4hOso
 3YeU318bVAs/fKIk51nDPzCWSSEN3TKGxkF+Nw2R8VRaN5wL+nLwddavz/GBry3l
 s24ch43O85OU2ge6SIMH+hix1jcqDyf0nhujLCHSqR1/UcgpVfNnvuAWP20LedQV
 ZXgPHY/0XYJ2lfT7Qzs/WdUtJHC90fanhjpuUW53o1SedzECPS9frhaYXmMpJ1Nq
 Ljw0omXQA82gvKYpLpWdzat1LLceDVN2voVzWBiRSGKH6W6CDFF1+PT/JpIbDFw6
 JLUUQJnWleiwoHEkg0JO+9qeS79tZYAyhPYBJpboJksvASgs008RbsEupKA87O17
 uA7GlqFRvfMKA/oh++xxobMVQPZZxNWKJ154thFcnhs9vh1huNtINMKG8v5NO49w
 3EbrF2UxFj8CU48Ik+58a/+wL6I9YFl8oeZ+AY4Fc+Yuu87x3sU=
 =ospr
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_dts_updates_for_v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.18
- Add and enable gmac for Agilex5

* tag 'socfpga_dts_updates_for_v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: socfpga: agilex5: enable gmac2 on the Agilex5 dev kit
  arm64: dts: Agilex5 Add gmac nodes to DTSI for Agilex5

Link: https://lore.kernel.org/r/20250908040718.187857-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-09-15 15:02:06 +02:00
commit b116106509
2 changed files with 356 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

336
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
View File

@ -486,5 +486,341 @@ qspi: spi@108d2000 {
clocks = <&qspi_clk>;
status = "disabled";
};
gmac0: ethernet@10810000 {
compatible = "altr,socfpga-stmmac-agilex5",
"snps,dwxgmac-2.10";
reg = <0x10810000 0x3500>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
reset-names = "stmmaceth", "ahb";
clocks = <&clkmgr AGILEX5_EMAC0_CLK>,
<&clkmgr AGILEX5_EMAC_PTP_CLK>;
clock-names = "stmmaceth", "ptp_ref";
mac-address = [00 00 00 00 00 00];
tx-fifo-depth = <32768>;
rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <64>;
snps,perfect-filter-entries = <64>;
snps,axi-config = <&stmmac_axi_emac0_setup>;
snps,mtl-rx-config = <&mtl_rx_emac0_setup>;
snps,mtl-tx-config = <&mtl_tx_emac0_setup>;
snps,pbl = <32>;
snps,tso;
altr,sysmgr-syscon = <&sysmgr 0x44 0>;
snps,clk-csr = <0>;
status = "disabled";
stmmac_axi_emac0_setup: stmmac-axi-config {
snps,wr_osr_lmt = <31>;
snps,rd_osr_lmt = <31>;
snps,blen = <0 0 0 32 16 8 4>;
};
mtl_rx_emac0_setup: rx-queues-config {
snps,rx-queues-to-use = <8>;
snps,rx-sched-sp;
queue0 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x0>;
};
queue1 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x1>;
};
queue2 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x2>;
};
queue3 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x3>;
};
queue4 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x4>;
};
queue5 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x5>;
};
queue6 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x6>;
};
queue7 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x7>;
};
};
mtl_tx_emac0_setup: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x09>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x0A>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x0B>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x0C>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x0D>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x0E>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x0F>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x10>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
};
};
gmac1: ethernet@10820000 {
compatible = "altr,socfpga-stmmac-agilex5",
"snps,dwxgmac-2.10";
reg = <0x10820000 0x3500>;
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
reset-names = "stmmaceth", "ahb";
clocks = <&clkmgr AGILEX5_EMAC1_CLK>,
<&clkmgr AGILEX5_EMAC_PTP_CLK>;
clock-names = "stmmaceth", "ptp_ref";
mac-address = [00 00 00 00 00 00];
tx-fifo-depth = <32768>;
rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <64>;
snps,perfect-filter-entries = <64>;
snps,axi-config = <&stmmac_axi_emac1_setup>;
snps,mtl-rx-config = <&mtl_rx_emac1_setup>;
snps,mtl-tx-config = <&mtl_tx_emac1_setup>;
snps,pbl = <32>;
snps,tso;
altr,sysmgr-syscon = <&sysmgr 0x48 0>;
snps,clk-csr = <0>;
status = "disabled";
stmmac_axi_emac1_setup: stmmac-axi-config {
snps,wr_osr_lmt = <31>;
snps,rd_osr_lmt = <31>;
snps,blen = <0 0 0 32 16 8 4>;
};
mtl_rx_emac1_setup: rx-queues-config {
snps,rx-queues-to-use = <8>;
snps,rx-sched-sp;
queue0 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x0>;
};
queue1 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x1>;
};
queue2 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x2>;
};
queue3 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x3>;
};
queue4 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x4>;
};
queue5 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x5>;
};
queue6 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x6>;
};
queue7 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x7>;
};
};
mtl_tx_emac1_setup: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x09>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x0A>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x0B>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x0C>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x0D>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x0E>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x0F>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x10>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
};
};
gmac2: ethernet@10830000 {
compatible = "altr,socfpga-stmmac-agilex5",
"snps,dwxgmac-2.10";
reg = <0x10830000 0x3500>;
interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
reset-names = "stmmaceth", "ahb";
clocks = <&clkmgr AGILEX5_EMAC2_CLK>,
<&clkmgr AGILEX5_EMAC_PTP_CLK>;
clock-names = "stmmaceth", "ptp_ref";
mac-address = [00 00 00 00 00 00];
tx-fifo-depth = <32768>;
rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <64>;
snps,perfect-filter-entries = <64>;
snps,axi-config = <&stmmac_axi_emac2_setup>;
snps,mtl-rx-config = <&mtl_rx_emac2_setup>;
snps,mtl-tx-config = <&mtl_tx_emac2_setup>;
snps,pbl = <32>;
snps,tso;
altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
snps,clk-csr = <0>;
status = "disabled";
stmmac_axi_emac2_setup: stmmac-axi-config {
snps,wr_osr_lmt = <31>;
snps,rd_osr_lmt = <31>;
snps,blen = <0 0 0 32 16 8 4>;
};
mtl_rx_emac2_setup: rx-queues-config {
snps,rx-queues-to-use = <8>;
snps,rx-sched-sp;
queue0 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x0>;
};
queue1 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x1>;
};
queue2 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x2>;
};
queue3 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x3>;
};
queue4 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x4>;
};
queue5 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x5>;
};
queue6 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x6>;
};
queue7 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x7>;
};
};
mtl_tx_emac2_setup: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x09>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x0A>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x0B>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x0C>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x0D>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x0E>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x0F>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x10>;
snps,coe-unsupported;
snps,dcb-algorithm;
};
};
};
};
};

20
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
View File

@ -10,6 +10,9 @@ / {
aliases {
serial0 = &uart0;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
ethernet2 = &gmac2;
};
chosen {
@ -37,6 +40,23 @@ &gpio0 {
status = "okay";
};
&gmac2 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&emac2_phy0>;
max-frame-size = <9000>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
emac2_phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
&gpio1 {
status = "okay";
};