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Clocksource/event driver updates:

Browse Source 
- Remove redundant dev_err() and dev_err_probe() invocations in various
     drivers.
 
   - Handle SWAP_IO_SPACE correctly in the rtl-otto driver
 
   - Make the Samsumg PWM timer driver PREEMPT_RT compatible
 
   - Ensure that the SUN4I timer is programmed with a delta larger than zero
     as a zero delta causes the the timer to be disabled.
 
   - The usual fixes and improvements all over the place
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Merge tag 'timers-clocksource-2026-08-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull clocksource/event driver updates from Thomas Gleixner:

 - Remove redundant dev_err() and dev_err_probe() invocations in various
   drivers

 - Handle SWAP_IO_SPACE correctly in the rtl-otto driver

 - Make the Samsumg PWM timer driver PREEMPT_RT compatible

 - Ensure that the SUN4I timer is programmed with a delta larger than
   zero as a zero delta causes the the timer to be disabled

 - The usual fixes and improvements all over the place

* tag 'timers-clocksource-2026-08-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource/drivers/armada: Unwind timer clock on init failure
  clocksource/drivers/rtl-otto: Change driver to use __raw reads and writes
  clocksource/drivers/samsung_pwm: Switch to raw_spinlock_t type
  clocksource/drivers/clps711x: Do not unmap clocksource MMIO
  clocksource/drivers/nxp-pit: Fix IRQ leak on cpuhp_setup_state error path
  clocksource/drivers/timer-sun4i: Advertise a real minimum delta
  clocksource: Remove redundant dev_err()/dev_err_probe()
  clocksource/drivers/sh_cmt: Use named initializers for platform_device_id arrays
  clocksource/drivers/sh_mtu2: Drop unused assignment of platform_device_id
This commit is contained in:
Linus Torvalds 2026-08-18 16:20:25 -07:00
commit b0239dd672
17 changed files with 62 additions and 58 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/clocksource/arm_arch_timer_mmio.c
View File

@ -313,10 +313,8 @@ static int arch_timer_mmio_frame_register(struct platform_device *pdev,
ret = devm_request_irq(&pdev->dev, irq, arch_timer_mmio_handler,
IRQF_TIMER | IRQF_NO_AUTOEN, "arch_mem_timer",
&at->evt);
if (ret) {
dev_err(&pdev->dev, "Failed to request mem timer irq\n");
if (ret)
return ret;
}
/* Afer this point, we're not allowed to fail anymore */
arch_timer_mmio_setup(at, irq);

2
drivers/clocksource/clps711x-timer.c
View File

@ -94,7 +94,7 @@ static int __init clps711x_timer_init(struct device_node *np)
switch (of_alias_get_id(np, "timer")) {
case CLPS711X_CLKSRC_CLOCKSOURCE:
clps711x_clksrc_init(clock, base);
break;
return 0;
case CLPS711X_CLKSRC_CLOCKEVENT:
ret = _clps711x_clkevt_init(clock, base, irq);
break;

4
drivers/clocksource/em_sti.c
View File

@ -300,10 +300,8 @@ static int em_sti_probe(struct platform_device *pdev)
ret = devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
dev_name(&pdev->dev), p);
if (ret) {
dev_err(&pdev->dev, "failed to request low IRQ\n");
if (ret)
return ret;
}
/* get hold of clock */
p->clk = devm_clk_get(&pdev->dev, "sclk");

22
drivers/clocksource/samsung_pwm_timer.c
View File

@ -56,7 +56,7 @@
#define TCON_AUTORELOAD(chan) \
((chan < 5) ? _TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan))
DEFINE_SPINLOCK(samsung_pwm_lock);
DEFINE_RAW_SPINLOCK(samsung_pwm_lock);
EXPORT_SYMBOL(samsung_pwm_lock);
struct samsung_pwm_clocksource {
@ -87,14 +87,14 @@ static void samsung_timer_set_prescale(unsigned int channel, u16 prescale)
if (channel >= 2)
shift = TCFG0_PRESCALER1_SHIFT;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
reg = readl(pwm.base + REG_TCFG0);
reg &= ~(TCFG0_PRESCALER_MASK << shift);
reg |= (prescale - 1) << shift;
writel(reg, pwm.base + REG_TCFG0);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
static void samsung_timer_set_divisor(unsigned int channel, u8 divisor)
@ -106,14 +106,14 @@ static void samsung_timer_set_divisor(unsigned int channel, u8 divisor)
bits = (fls(divisor) - 1) - pwm.variant.div_base;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
reg = readl(pwm.base + REG_TCFG1);
reg &= ~(TCFG1_MUX_MASK << shift);
reg |= bits << shift;
writel(reg, pwm.base + REG_TCFG1);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
static void samsung_time_stop(unsigned int channel)
@ -124,13 +124,13 @@ static void samsung_time_stop(unsigned int channel)
if (channel > 0)
++channel;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
tcon = readl_relaxed(pwm.base + REG_TCON);
tcon &= ~TCON_START(channel);
writel_relaxed(tcon, pwm.base + REG_TCON);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
@ -142,7 +142,7 @@ static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
if (tcon_chan > 0)
++tcon_chan;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
tcon = readl_relaxed(pwm.base + REG_TCON);
@ -153,7 +153,7 @@ static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
writel_relaxed(tcnt, pwm.base + REG_TCMPB(channel));
writel_relaxed(tcon, pwm.base + REG_TCON);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
static void samsung_time_start(unsigned int channel, bool periodic)
@ -164,7 +164,7 @@ static void samsung_time_start(unsigned int channel, bool periodic)
if (channel > 0)
++channel;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
tcon = readl_relaxed(pwm.base + REG_TCON);
@ -178,7 +178,7 @@ static void samsung_time_start(unsigned int channel, bool periodic)
writel_relaxed(tcon, pwm.base + REG_TCON);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
static int samsung_set_next_event(unsigned long cycles,

4
drivers/clocksource/sh_cmt.c
View File

@ -974,8 +974,8 @@ static int sh_cmt_map_memory(struct sh_cmt_device *cmt)
}
static const struct platform_device_id sh_cmt_id_table[] = {
{ "sh-cmt-16", (kernel_ulong_t)&sh_cmt_info[SH_CMT_16BIT] },
{ "sh-cmt-32", (kernel_ulong_t)&sh_cmt_info[SH_CMT_32BIT] },
{ .name = "sh-cmt-16", .driver_data = (kernel_ulong_t)&sh_cmt_info[SH_CMT_16BIT] },
{ .name = "sh-cmt-32", .driver_data = (kernel_ulong_t)&sh_cmt_info[SH_CMT_32BIT] },
{ }
};
MODULE_DEVICE_TABLE(platform, sh_cmt_id_table);

4
drivers/clocksource/sh_mtu2.c
View File

@ -484,8 +484,8 @@ static int sh_mtu2_probe(struct platform_device *pdev)
}
static const struct platform_device_id sh_mtu2_id_table[] = {
{ "sh-mtu2", 0 },
{ },
{ .name = "sh-mtu2" },
{ }
};
MODULE_DEVICE_TABLE(platform, sh_mtu2_id_table);

4
drivers/clocksource/sh_tmu.c
View File

@ -614,8 +614,8 @@ static int sh_tmu_probe(struct platform_device *pdev)
}
static const struct platform_device_id sh_tmu_id_table[] = {
{ "sh-tmu", SH_TMU },
{ "sh-tmu-sh3", SH_TMU_SH3 },
{ .name = "sh-tmu", .driver_data = SH_TMU },
{ .name = "sh-tmu-sh3", .driver_data = SH_TMU_SH3 },
{ }
};
MODULE_DEVICE_TABLE(platform, sh_tmu_id_table);

18
drivers/clocksource/timer-armada-370-xp.c
View File

@ -349,7 +349,11 @@ static int __init armada_xp_timer_init(struct device_node *np)
timer_clk = clk_get_rate(clk);
return armada_370_xp_timer_common_init(np);
ret = armada_370_xp_timer_common_init(np);
if (ret)
clk_disable_unprepare(clk);
return ret;
}
TIMER_OF_DECLARE(armada_xp, "marvell,armada-xp-timer",
armada_xp_timer_init);
@ -387,7 +391,11 @@ static int __init armada_375_timer_init(struct device_node *np)
timer25Mhz = false;
}
return armada_370_xp_timer_common_init(np);
ret = armada_370_xp_timer_common_init(np);
if (ret)
clk_disable_unprepare(clk);
return ret;
}
TIMER_OF_DECLARE(armada_375, "marvell,armada-375-timer",
armada_375_timer_init);
@ -410,7 +418,11 @@ static int __init armada_370_timer_init(struct device_node *np)
timer_clk = clk_get_rate(clk) / TIMER_DIVIDER;
timer25Mhz = false;
return armada_370_xp_timer_common_init(np);
ret = armada_370_xp_timer_common_init(np);
if (ret)
clk_disable_unprepare(clk);
return ret;
}
TIMER_OF_DECLARE(armada_370, "marvell,armada-370-timer",
armada_370_timer_init);

4
drivers/clocksource/timer-nxp-pit.c
View File

@ -328,8 +328,10 @@ static int pit_timer_init(struct device_node *np)
if (pit_instances == max_pit_instances) {
ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "PIT timer:starting",
pit_clockevent_starting_cpu, NULL);
if (ret < 0)
if (ret < 0) {
pit_clockevent_per_cpu_exit(pit, pit_instances);
goto out_pit_clocksource_unregister;
}
}
return 0;

2
drivers/clocksource/timer-nxp-stm.c
View File

@ -441,7 +441,7 @@ static int nxp_stm_timer_probe(struct platform_device *pdev)
ret = devm_request_irq(dev, irq, nxp_stm_module_interrupt,
IRQF_TIMER | IRQF_NOBALANCING, name, stm_timer);
if (ret)
return dev_err_probe(dev, ret, "Unable to allocate interrupt line\n");
return ret;
ret = nxp_stm_clocksource_init(dev, stm_timer, name, base, clk);
if (ret)

14
drivers/clocksource/timer-rtl-otto.c
View File

@ -56,37 +56,37 @@ struct rttm_cs {
/* Simple internal register functions */
static inline unsigned int rttm_get_counter(void __iomem *base)
{
return ioread32(base + RTTM_CNT);
return __raw_readl(base + RTTM_CNT);
}
static inline void rttm_set_period(void __iomem *base, unsigned int period)
{
iowrite32(period, base + RTTM_DATA);
__raw_writel(period, base + RTTM_DATA);
}
static inline void rttm_disable_timer(void __iomem *base)
{
iowrite32(0, base + RTTM_CTRL);
__raw_writel(0, base + RTTM_CTRL);
}
static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 divisor)
{
iowrite32(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL);
__raw_writel(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL);
}
static inline void rttm_ack_irq(void __iomem *base)
{
iowrite32(ioread32(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM_INT);
__raw_writel(__raw_readl(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM_INT);
}
static inline void rttm_enable_irq(void __iomem *base)
{
iowrite32(RTTM_INT_ENABLE, base + RTTM_INT);
__raw_writel(RTTM_INT_ENABLE, base + RTTM_INT);
}
static inline void rttm_disable_irq(void __iomem *base)
{
iowrite32(0, base + RTTM_INT);
__raw_writel(0, base + RTTM_INT);
}
/* Aggregated control functions for kernel clock framework */

2
drivers/clocksource/timer-sun4i.c
View File

@ -208,7 +208,7 @@ static int __init sun4i_timer_init(struct device_node *node)
sun4i_timer_clear_interrupt(timer_of_base(&to));
clockevents_config_and_register(&to.clkevt, timer_of_rate(&to),
TIMER_SYNC_TICKS, 0xffffffff);
TIMER_SYNC_TICKS + 1, 0xffffffff);
/* Enable timer0 interrupt */
val = readl(timer_of_base(&to) + TIMER_IRQ_EN_REG);

4
drivers/clocksource/timer-sun5i.c
View File

@ -247,10 +247,8 @@ static int sun5i_setup_clockevent(struct platform_device *pdev,
ret = devm_request_irq(dev, irq, sun5i_timer_interrupt,
IRQF_TIMER | IRQF_IRQPOLL,
"sun5i_timer0", ce);
if (ret) {
dev_err(dev, "Unable to register interrupt\n");
if (ret)
return ret;
}
return 0;
}

4
drivers/clocksource/timer-tegra186.c
View File

@ -532,10 +532,8 @@ static int tegra186_timer_probe(struct platform_device *pdev)
if (kernel_wdt) {
err = devm_request_irq(dev, irq, tegra186_wdt_irq, 0,
dev_name(dev), kernel_wdt);
if (err < 0) {
dev_err(dev, "failed to request kernel WDT IRQ: %d\n", err);
if (err < 0)
goto unregister_usec;
}
tegra186_wdt_set_timeout(&kernel_wdt->base, TEGRA186_KERNEL_WDT_TIMEOUT);
tegra186_wdt_enable(kernel_wdt);

4
drivers/clocksource/timer-ti-dm.c
View File

@ -1375,10 +1375,8 @@ static int omap_dm_timer_setup_clockevent(struct dmtimer *timer)
ret = devm_request_irq(dev, timer->irq, omap_dm_timer_evt_interrupt,
IRQF_TIMER, "omap_dm_timer_clockevent", clkevt);
if (ret) {
dev_err(dev, "Failed to request interrupt: %d\n", ret);
if (ret)
return ret;
}
__omap_dm_timer_int_enable(timer, OMAP_TIMER_INT_OVERFLOW);

22
drivers/pwm/pwm-samsung.c
View File

@ -102,7 +102,7 @@ struct samsung_pwm_chip {
* IP. Should this change, both drivers will need to be modified to
* properly synchronize accesses to particular instances.
*/
static DEFINE_SPINLOCK(samsung_pwm_lock);
static DEFINE_RAW_SPINLOCK(samsung_pwm_lock);
#endif
static inline
@ -141,14 +141,14 @@ static void pwm_samsung_set_divisor(struct samsung_pwm_chip *our_chip,
bits = (fls(divisor) - 1) - our_chip->variant.div_base;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
reg = readl(our_chip->base + REG_TCFG1);
reg &= ~(TCFG1_MUX_MASK << shift);
reg |= bits << shift;
writel(reg, our_chip->base + REG_TCFG1);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
static int pwm_samsung_is_tdiv(struct samsung_pwm_chip *our_chip, unsigned int chan)
@ -249,7 +249,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm)
unsigned long flags;
u32 tcon;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
tcon = readl(our_chip->base + REG_TCON);
@ -263,7 +263,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm)
our_chip->disabled_mask &= ~BIT(pwm->hwpwm);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
return 0;
}
@ -275,7 +275,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
unsigned long flags;
u32 tcon;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
tcon = readl(our_chip->base + REG_TCON);
tcon &= ~TCON_AUTORELOAD(tcon_chan);
@ -290,7 +290,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
our_chip->disabled_mask |= BIT(pwm->hwpwm);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
static void pwm_samsung_manual_update(struct samsung_pwm_chip *our_chip,
@ -298,11 +298,11 @@ static void pwm_samsung_manual_update(struct samsung_pwm_chip *our_chip,
{
unsigned long flags;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
__pwm_samsung_manual_update(our_chip, pwm);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
static int __pwm_samsung_config(struct pwm_chip *chip, struct pwm_device *pwm,
@ -390,7 +390,7 @@ static void pwm_samsung_set_invert(struct samsung_pwm_chip *our_chip,
unsigned long flags;
u32 tcon;
spin_lock_irqsave(&samsung_pwm_lock, flags);
raw_spin_lock_irqsave(&samsung_pwm_lock, flags);
tcon = readl(our_chip->base + REG_TCON);
@ -404,7 +404,7 @@ static void pwm_samsung_set_invert(struct samsung_pwm_chip *our_chip,
writel(tcon, our_chip->base + REG_TCON);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
static int pwm_samsung_set_polarity(struct pwm_chip *chip,

2
include/clocksource/samsung_pwm.h
View File

@ -15,7 +15,7 @@
* spinlock is not shared between both drivers.
*/
#ifdef CONFIG_CLKSRC_SAMSUNG_PWM
extern spinlock_t samsung_pwm_lock;
extern raw_spinlock_t samsung_pwm_lock;
#endif
struct samsung_pwm_variant {