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i.MX arm64 device tree changes for v7.2 (part2)

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- Revert the 32-bit non-prefetchable PCIe window from 3 GiB back to 1 GiB
 to prevent overlap between inbound DMA address space and low system RAM.
 Such overlap can cause DMA transactions to be routed to a BAR on the same
 host bridge instead of system memory.
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Merge tag 'imx-dt64-7.2-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux into soc/dt

i.MX arm64 device tree changes for v7.2 (part2)

- Revert the 32-bit non-prefetchable PCIe window from 3 GiB back to 1 GiB
to prevent overlap between inbound DMA address space and low system RAM.
Such overlap can cause DMA transactions to be routed to a BAR on the same
host bridge instead of system memory.

* tag 'imx-dt64-7.2-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux:
  arm64: dts: lx2160a-rev2: avoid 32-bit pcie window system ram overlap

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2026-06-10 22:41:54 +02:00
commit aecab2dd61
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi
View File

@ -17,7 +17,7 @@ &pcie1 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0x80 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
<0x82000000 0x00 0x40000000 0x80 0x40000000 0x00 0xc0000000>,
<0x82000000 0x00 0x40000000 0x80 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0x84 0x00000000 0x84 0x00000000 0x04 0x00000000>;
@ -37,7 +37,7 @@ &pcie2 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0x88 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
<0x82000000 0x00 0x40000000 0x88 0x40000000 0x00 0xc0000000>,
<0x82000000 0x00 0x40000000 0x88 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0x8c 0x00000000 0x8c 0x00000000 0x04 0x00000000>;
@ -57,7 +57,7 @@ &pcie3 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0x90 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
<0x82000000 0x00 0x40000000 0x90 0x40000000 0x00 0xc0000000>,
<0x82000000 0x00 0x40000000 0x90 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0x94 0x00000000 0x94 0x00000000 0x04 0x00000000>;
@ -78,7 +78,7 @@ &pcie4 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0x98 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
<0x82000000 0x00 0x40000000 0x98 0x40000000 0x00 0xc0000000>,
<0x82000000 0x00 0x40000000 0x98 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0x9c 0x00000000 0x9c 0x00000000 0x04 0x00000000>;
@ -98,7 +98,7 @@ &pcie5 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0xa0 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
<0x82000000 0x00 0x40000000 0xa0 0x40000000 0x00 0xc0000000>,
<0x82000000 0x00 0x40000000 0xa0 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0xa4 0x00000000 0xa4 0x00000000 0x04 0x00000000>;
@ -118,7 +118,7 @@ &pcie6 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0xa8 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
<0x82000000 0x00 0x40000000 0xa8 0x40000000 0x00 0xc0000000>,
<0x82000000 0x00 0x40000000 0xa8 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0xac 0x00000000 0xac 0x00000000 0x04 0x00000000>;