mirror of
https://github.com/torvalds/linux.git
synced 2026-07-28 10:09:10 +02:00
wifi: rtw89: Add rtw8922a_dle_mem_usb{2,3}
Add rtw8922a_dle_mem_usb2 and rtw8922a_dle_mem_usb3 and their various quotas and sizes in struct rtw89_mac_size_set. "dle" could be "Data Link Engine" or "Double Link Engine". These are some parameters needed for RTL8922AU. Also rename wde_size4_v1 to wde_size3_v1 because the name seemed incorrect. Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> Acked-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/f9ac366b-ca8d-492e-83bf-440f8557c629@gmail.com
This commit is contained in:
Bitterblue Smith
Ping-Ke Shih
parent
bd87e92700
commit
abe23df7c8
|
|
@ -1725,12 +1725,18 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
|
|||
/* 8852A USB */
|
||||
.wde_size1 = {RTW89_WDE_PG_64, 768, 0,},
|
||||
/* DLFW */
|
||||
.wde_size3_v1 = {RTW89_WDE_PG_64, 0, 3328, 0,},
|
||||
.wde_size4 = {RTW89_WDE_PG_64, 0, 4096,},
|
||||
.wde_size4_v1 = {RTW89_WDE_PG_64, 0, 3328, 0,},
|
||||
/* 8922A USB3.0 */
|
||||
.wde_size4_v1 = {RTW89_WDE_PG_64, 892, 4, 0,},
|
||||
.wde_size5_v1 = {RTW89_WDE_PG_64, 864, 32, 0,},
|
||||
/* PCIE 64 */
|
||||
.wde_size6 = {RTW89_WDE_PG_64, 512, 0,},
|
||||
/* 8852B PCIE SCC */
|
||||
.wde_size7 = {RTW89_WDE_PG_64, 510, 2,},
|
||||
/* 8922A USB2.0 */
|
||||
.wde_size7_v1 = {RTW89_WDE_PG_64, 508, 4,},
|
||||
.wde_size8_v1 = {RTW89_WDE_PG_64, 634, 6,},
|
||||
/* DLFW */
|
||||
.wde_size9 = {RTW89_WDE_PG_64, 0, 1024,},
|
||||
.wde_size16_v1 = {RTW89_WDE_PG_64, 639, 1, 0,},
|
||||
|
|
@ -1754,8 +1760,13 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
|
|||
.ple_size3_v1 = {RTW89_PLE_PG_128, 2928, 0, 212992,},
|
||||
/* DLFW */
|
||||
.ple_size4 = {RTW89_PLE_PG_128, 64, 1472,},
|
||||
/* 8922A USB3.0 */
|
||||
.ple_size4_v1 = {RTW89_PLE_PG_256, 1963, 109, 57344,},
|
||||
/* PCIE 64 */
|
||||
.ple_size6 = {RTW89_PLE_PG_128, 496, 16,},
|
||||
/* 8922A USB2.0 */
|
||||
.ple_size6_v1 = {RTW89_PLE_PG_256, 2059, 109, 32768,},
|
||||
.ple_size7_v1 = {RTW89_PLE_PG_256, 2027, 109, 40960,},
|
||||
/* DLFW */
|
||||
.ple_size8 = {RTW89_PLE_PG_128, 64, 960,},
|
||||
.ple_size9 = {RTW89_PLE_PG_128, 2288, 16,},
|
||||
|
|
@ -1781,10 +1792,16 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
|
|||
.wde_qt3 = {0, 0, 0, 0,},
|
||||
/* DLFW */
|
||||
.wde_qt4 = {0, 0, 0, 0,},
|
||||
/* 8922A USB3.0 */
|
||||
.wde_qt4_v1 = {876, 6, 0, 10,},
|
||||
.wde_qt5_v1 = {838, 6, 0, 20,},
|
||||
/* PCIE 64 */
|
||||
.wde_qt6 = {448, 48, 0, 16,},
|
||||
/* 8852B PCIE SCC */
|
||||
.wde_qt7 = {446, 48, 0, 16,},
|
||||
/* 8922A USB2.0 */
|
||||
.wde_qt7_v1 = {492, 6, 0, 10,},
|
||||
.wde_qt8_v1 = {608, 6, 0, 20,},
|
||||
/* 8852C USB3.0 */
|
||||
.wde_qt16 = {344, 2, 0, 8,},
|
||||
/* 8852C DLFW */
|
||||
|
|
@ -1804,9 +1821,22 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
|
|||
/* PCIE SCC */
|
||||
.ple_qt5 = {264, 0, 32, 20, 64, 13, 1101, 0, 64, 128, 120,},
|
||||
.ple_qt5_v2 = {0, 0, 32, 256, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,},
|
||||
/* 8922A USB3.0 */
|
||||
.ple_qt6_v1 = {1806, 0, 16, 24, 7, 14, 57, 0, 12, 9, 1, 4, 0,},
|
||||
.ple_qt7_v1 = {1806, 0, 16, 24, 20, 27, 70, 0, 25, 9, 1, 17, 0,},
|
||||
.ple_qt8_v1 = {1638, 0, 16, 24, 7, 14, 99, 99, 24, 9, 1, 4, 0,},
|
||||
/* PCIE SCC */
|
||||
.ple_qt9 = {0, 0, 32, 256, 0, 0, 0, 0, 0, 0, 1, 0, 0,},
|
||||
/* 8922A USB3.0 */
|
||||
.ple_qt9_v1 = {1638, 0, 16, 24, 35, 42, 127, 127, 52, 9, 1, 32, 0,},
|
||||
/* 8922A USB2.0 */
|
||||
.ple_qt12_v1 = {463, 0, 16, 24, 7, 14, 57, 0, 12, 9, 1, 4, 0,},
|
||||
/* DLFW */
|
||||
.ple_qt13 = {0, 0, 16, 48, 0, 0, 0, 0, 0, 0, 0,},
|
||||
/* 8922A USB2.0 */
|
||||
.ple_qt13_v1 = {463, 0, 16, 24, 1459, 1466, 1509, 0, 1464, 9, 1, 1456, 0,},
|
||||
.ple_qt14_v1 = {939, 0, 16, 24, 7, 14, 57, 57, 24, 9, 1, 4, 0,},
|
||||
.ple_qt15_v1 = {939, 0, 16, 24, 882, 889, 932, 932, 899, 9, 1, 879, 0,},
|
||||
/* PCIE 64 */
|
||||
.ple_qt18 = {147, 0, 16, 20, 17, 13, 89, 0, 32, 14, 8, 0,},
|
||||
/* 8852A USB SCC */
|
||||
|
|
@ -1850,8 +1880,11 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
|
|||
.ple_qt_51b_wow = {147, 0, 16, 20, 157, 13, 133, 0, 172, 14, 24, 0,},
|
||||
.ple_rsvd_qt0 = {2, 107, 107, 6, 6, 6, 6, 0, 0, 0,},
|
||||
.ple_rsvd_qt1 = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0,},
|
||||
.ple_rsvd_qt2 = {1, 56, 28, 6, 6, 6, 6, 0, 0, 0,},
|
||||
.ple_rsvd_qt9 = {1, 44, 44, 6, 6, 6, 6, 69, 0, 0,},
|
||||
.rsvd0_size0 = {212992, 0,},
|
||||
.rsvd0_size3 = {57344, 0,},
|
||||
.rsvd0_size5 = {32768, 0,},
|
||||
.rsvd0_size6 = {40960, 0,},
|
||||
.rsvd1_size0 = {587776, 2048,},
|
||||
.rsvd1_size2 = {391168, 2048,},
|
||||
|
|
|
|||
|
|
@ -932,10 +932,14 @@ struct rtw89_mac_size_set {
|
|||
const struct rtw89_dle_size wde_size0;
|
||||
const struct rtw89_dle_size wde_size1;
|
||||
const struct rtw89_dle_size wde_size0_v1;
|
||||
const struct rtw89_dle_size wde_size3_v1;
|
||||
const struct rtw89_dle_size wde_size4;
|
||||
const struct rtw89_dle_size wde_size4_v1;
|
||||
const struct rtw89_dle_size wde_size5_v1;
|
||||
const struct rtw89_dle_size wde_size6;
|
||||
const struct rtw89_dle_size wde_size7;
|
||||
const struct rtw89_dle_size wde_size7_v1;
|
||||
const struct rtw89_dle_size wde_size8_v1;
|
||||
const struct rtw89_dle_size wde_size9;
|
||||
const struct rtw89_dle_size wde_size16_v1;
|
||||
const struct rtw89_dle_size wde_size17;
|
||||
|
|
@ -949,8 +953,11 @@ struct rtw89_mac_size_set {
|
|||
const struct rtw89_dle_size ple_size1;
|
||||
const struct rtw89_dle_size ple_size0_v1;
|
||||
const struct rtw89_dle_size ple_size3_v1;
|
||||
const struct rtw89_dle_size ple_size4_v1;
|
||||
const struct rtw89_dle_size ple_size4;
|
||||
const struct rtw89_dle_size ple_size6;
|
||||
const struct rtw89_dle_size ple_size6_v1;
|
||||
const struct rtw89_dle_size ple_size7_v1;
|
||||
const struct rtw89_dle_size ple_size8;
|
||||
const struct rtw89_dle_size ple_size9;
|
||||
const struct rtw89_dle_size ple_size17;
|
||||
|
|
@ -966,8 +973,12 @@ struct rtw89_mac_size_set {
|
|||
const struct rtw89_wde_quota wde_qt0_v1;
|
||||
const struct rtw89_wde_quota wde_qt3;
|
||||
const struct rtw89_wde_quota wde_qt4;
|
||||
const struct rtw89_wde_quota wde_qt4_v1;
|
||||
const struct rtw89_wde_quota wde_qt5_v1;
|
||||
const struct rtw89_wde_quota wde_qt6;
|
||||
const struct rtw89_wde_quota wde_qt7;
|
||||
const struct rtw89_wde_quota wde_qt7_v1;
|
||||
const struct rtw89_wde_quota wde_qt8_v1;
|
||||
const struct rtw89_wde_quota wde_qt16;
|
||||
const struct rtw89_wde_quota wde_qt17;
|
||||
const struct rtw89_wde_quota wde_qt18;
|
||||
|
|
@ -980,8 +991,16 @@ struct rtw89_mac_size_set {
|
|||
const struct rtw89_ple_quota ple_qt4;
|
||||
const struct rtw89_ple_quota ple_qt5;
|
||||
const struct rtw89_ple_quota ple_qt5_v2;
|
||||
const struct rtw89_ple_quota ple_qt6_v1;
|
||||
const struct rtw89_ple_quota ple_qt7_v1;
|
||||
const struct rtw89_ple_quota ple_qt8_v1;
|
||||
const struct rtw89_ple_quota ple_qt9;
|
||||
const struct rtw89_ple_quota ple_qt9_v1;
|
||||
const struct rtw89_ple_quota ple_qt12_v1;
|
||||
const struct rtw89_ple_quota ple_qt13;
|
||||
const struct rtw89_ple_quota ple_qt13_v1;
|
||||
const struct rtw89_ple_quota ple_qt14_v1;
|
||||
const struct rtw89_ple_quota ple_qt15_v1;
|
||||
const struct rtw89_ple_quota ple_qt18;
|
||||
const struct rtw89_ple_quota ple_qt25;
|
||||
const struct rtw89_ple_quota ple_qt26;
|
||||
|
|
@ -1009,8 +1028,11 @@ struct rtw89_mac_size_set {
|
|||
const struct rtw89_rsvd_quota ple_rsvd_qt0;
|
||||
const struct rtw89_rsvd_quota ple_rsvd_qt1;
|
||||
const struct rtw89_rsvd_quota ple_rsvd_qt1_v1;
|
||||
const struct rtw89_rsvd_quota ple_rsvd_qt2;
|
||||
const struct rtw89_rsvd_quota ple_rsvd_qt9;
|
||||
const struct rtw89_dle_rsvd_size rsvd0_size0;
|
||||
const struct rtw89_dle_rsvd_size rsvd0_size3;
|
||||
const struct rtw89_dle_rsvd_size rsvd0_size5;
|
||||
const struct rtw89_dle_rsvd_size rsvd0_size6;
|
||||
const struct rtw89_dle_rsvd_size rsvd1_size0;
|
||||
const struct rtw89_dle_rsvd_size rsvd1_size2;
|
||||
|
|
|
|||
|
|
@ -188,7 +188,47 @@ static const struct rtw89_dle_mem rtw8922a_dle_mem_pcie[] = {
|
|||
&rtw89_mac_size.wde_qt0_v1, &rtw89_mac_size.ple_qt0,
|
||||
&rtw89_mac_size.ple_qt1, &rtw89_mac_size.ple_rsvd_qt0,
|
||||
&rtw89_mac_size.rsvd0_size0, &rtw89_mac_size.rsvd1_size0},
|
||||
[RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size4_v1,
|
||||
[RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size3_v1,
|
||||
&rtw89_mac_size.ple_size3_v1, &rtw89_mac_size.wde_qt4,
|
||||
&rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt9,
|
||||
&rtw89_mac_size.ple_qt9, &rtw89_mac_size.ple_rsvd_qt1,
|
||||
&rtw89_mac_size.rsvd0_size0, &rtw89_mac_size.rsvd1_size0},
|
||||
[RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL,
|
||||
NULL},
|
||||
};
|
||||
|
||||
static const struct rtw89_dle_mem rtw8922a_dle_mem_usb2[] = {
|
||||
[RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size7_v1,
|
||||
&rtw89_mac_size.ple_size6_v1, &rtw89_mac_size.wde_qt7_v1,
|
||||
&rtw89_mac_size.wde_qt7_v1, &rtw89_mac_size.ple_qt12_v1,
|
||||
&rtw89_mac_size.ple_qt13_v1, &rtw89_mac_size.ple_rsvd_qt2,
|
||||
&rtw89_mac_size.rsvd0_size5, &rtw89_mac_size.rsvd1_size0},
|
||||
[RTW89_QTA_DBCC] = {RTW89_QTA_DBCC, &rtw89_mac_size.wde_size8_v1,
|
||||
&rtw89_mac_size.ple_size7_v1, &rtw89_mac_size.wde_qt8_v1,
|
||||
&rtw89_mac_size.wde_qt8_v1, &rtw89_mac_size.ple_qt14_v1,
|
||||
&rtw89_mac_size.ple_qt15_v1, &rtw89_mac_size.ple_rsvd_qt2,
|
||||
&rtw89_mac_size.rsvd0_size6, &rtw89_mac_size.rsvd1_size0},
|
||||
[RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size3_v1,
|
||||
&rtw89_mac_size.ple_size3_v1, &rtw89_mac_size.wde_qt4,
|
||||
&rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt9,
|
||||
&rtw89_mac_size.ple_qt9, &rtw89_mac_size.ple_rsvd_qt1,
|
||||
&rtw89_mac_size.rsvd0_size0, &rtw89_mac_size.rsvd1_size0},
|
||||
[RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL,
|
||||
NULL},
|
||||
};
|
||||
|
||||
static const struct rtw89_dle_mem rtw8922a_dle_mem_usb3[] = {
|
||||
[RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size4_v1,
|
||||
&rtw89_mac_size.ple_size4_v1, &rtw89_mac_size.wde_qt4_v1,
|
||||
&rtw89_mac_size.wde_qt4_v1, &rtw89_mac_size.ple_qt6_v1,
|
||||
&rtw89_mac_size.ple_qt7_v1, &rtw89_mac_size.ple_rsvd_qt2,
|
||||
&rtw89_mac_size.rsvd0_size3, &rtw89_mac_size.rsvd1_size0},
|
||||
[RTW89_QTA_DBCC] = {RTW89_QTA_DBCC, &rtw89_mac_size.wde_size5_v1,
|
||||
&rtw89_mac_size.ple_size4_v1, &rtw89_mac_size.wde_qt5_v1,
|
||||
&rtw89_mac_size.wde_qt5_v1, &rtw89_mac_size.ple_qt8_v1,
|
||||
&rtw89_mac_size.ple_qt9_v1, &rtw89_mac_size.ple_rsvd_qt2,
|
||||
&rtw89_mac_size.rsvd0_size3, &rtw89_mac_size.rsvd1_size0},
|
||||
[RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size3_v1,
|
||||
&rtw89_mac_size.ple_size3_v1, &rtw89_mac_size.wde_qt4,
|
||||
&rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt9,
|
||||
&rtw89_mac_size.ple_qt9, &rtw89_mac_size.ple_rsvd_qt1,
|
||||
|
|
@ -3093,7 +3133,10 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
|
|||
rtw8922a_hfc_param_ini_usb2,
|
||||
rtw8922a_hfc_param_ini_usb3,
|
||||
NULL},
|
||||
.dle_mem = {rtw8922a_dle_mem_pcie, NULL, NULL, NULL},
|
||||
.dle_mem = {rtw8922a_dle_mem_pcie,
|
||||
rtw8922a_dle_mem_usb2,
|
||||
rtw8922a_dle_mem_usb3,
|
||||
NULL},
|
||||
.wde_qempty_acq_grpnum = 4,
|
||||
.wde_qempty_mgq_grpsel = 4,
|
||||
.rf_base_addr = {0xe000, 0xf000},
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user