wifi: rtw89: Add rtw8922a_hfc_param_ini_usb{2,3}

"hfc" means "hci fc" which is "Host Control Interface Flow Control".
These are some parameters needed for RTL8922AU.

Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/474eb37a-a2e1-434a-b648-9e4b78e604d2@gmail.com
This commit is contained in:
Bitterblue Smith 2026-04-19 16:45:55 +03:00 committed by Ping-Ke Shih
parent c423ed43c9
commit bd87e92700
3 changed files with 130 additions and 1 deletions

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@ -1716,6 +1716,9 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
.hfc_preccfg_pcie = {2, 40, 0, 0, 1, 0, 0, 0},
.hfc_prec_cfg_c0 = {2, 32, 0, 0, 0, 0, 0, 0, 2, 32, 0, 0},
.hfc_prec_cfg_c2 = {0, 256, 0, 0, 0, 0, 0, 0, 0, 256, 0, 0},
.hfc_prec_cfg_c3 = {18, 32, 148, 148, 1, 1, 1, 1},
.hfc_prec_cfg_c5 = {18, 32, 148, 148, 1, 1, 0, 1},
.hfc_prec_cfg_c6 = {8, 32, 148, 148, 1, 1, 0, 1},
/* PCIE 64 */
.wde_size0 = {RTW89_WDE_PG_64, 4095, 1,},
.wde_size0_v1 = {RTW89_WDE_PG_64, 3328, 0, 0,},

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@ -926,6 +926,9 @@ struct rtw89_mac_size_set {
const struct rtw89_hfc_prec_cfg hfc_preccfg_pcie;
const struct rtw89_hfc_prec_cfg hfc_prec_cfg_c0;
const struct rtw89_hfc_prec_cfg hfc_prec_cfg_c2;
const struct rtw89_hfc_prec_cfg hfc_prec_cfg_c3;
const struct rtw89_hfc_prec_cfg hfc_prec_cfg_c5;
const struct rtw89_hfc_prec_cfg hfc_prec_cfg_c6;
const struct rtw89_dle_size wde_size0;
const struct rtw89_dle_size wde_size1;
const struct rtw89_dle_size wde_size0_v1;

View File

@ -57,6 +57,126 @@ static const struct rtw89_hfc_param_ini rtw8922a_hfc_param_ini_pcie[] = {
[RTW89_QTA_INVALID] = {NULL},
};
static const struct rtw89_hfc_ch_cfg rtw8922a_hfc_chcfg_ch7[] = {
{54, 222, grp_0}, /* ACH 0 */
{0, 0, grp_0}, /* ACH 1 */
{54, 222, grp_0}, /* ACH 2 */
{0, 0, grp_0}, /* ACH 3 */
{54, 222, grp_0}, /* ACH 4 */
{0, 0, grp_0}, /* ACH 5 */
{54, 222, grp_0}, /* ACH 6 */
{0, 0, grp_0}, /* ACH 7 */
{54, 222, grp_0}, /* B0MGQ */
{0, 0, grp_0}, /* B0HIQ */
{54, 222, grp_0}, /* B1MGQ */
{0, 0, grp_0}, /* B1HIQ */
{0, 0, 0}, /* FWCMDQ */
{0, 0, 0}, /* BMC */
{0, 0, 0}, /* H2D */
};
static const struct rtw89_hfc_pub_cfg rtw8922a_hfc_pubcfg_p7 = {
492, /* Group 0 */
0, /* Group 1 */
492, /* Public Max */
0, /* WP threshold */
};
static const struct rtw89_hfc_ch_cfg rtw8922a_hfc_chcfg_ch8[] = {
{24, 196, grp_0}, /* ACH 0 */
{0, 0, grp_0}, /* ACH 1 */
{54, 226, grp_0}, /* ACH 2 */
{0, 0, grp_0}, /* ACH 3 */
{54, 196, grp_1}, /* ACH 4 */
{0, 0, grp_1}, /* ACH 5 */
{54, 196, grp_1}, /* ACH 6 */
{0, 0, grp_1}, /* ACH 7 */
{54, 226, grp_0}, /* B0MGQ */
{0, 0, grp_0}, /* B0HIQ */
{54, 196, grp_1}, /* B1MGQ */
{0, 0, grp_0}, /* B1HIQ */
{0, 0, 0}, /* FWCMDQ */
{0, 0, 0}, /* BMC */
{0, 0, 0}, /* H2D */
};
static const struct rtw89_hfc_pub_cfg rtw8922a_hfc_pubcfg_p8 = {
304, /* Group 0 */
304, /* Group 1 */
608, /* Public Max */
96, /* WP threshold */
};
static const struct rtw89_hfc_param_ini rtw8922a_hfc_param_ini_usb2[] = {
[RTW89_QTA_SCC] = {rtw8922a_hfc_chcfg_ch7, &rtw8922a_hfc_pubcfg_p7,
&rtw89_mac_size.hfc_prec_cfg_c5, RTW89_HCIFC_STF},
[RTW89_QTA_DBCC] = {rtw8922a_hfc_chcfg_ch8, &rtw8922a_hfc_pubcfg_p8,
&rtw89_mac_size.hfc_prec_cfg_c6, RTW89_HCIFC_STF},
[RTW89_QTA_DLFW] = {NULL, NULL, &rtw89_mac_size.hfc_prec_cfg_c2,
RTW89_HCIFC_POH},
[RTW89_QTA_INVALID] = {NULL},
};
static const struct rtw89_hfc_ch_cfg rtw8922a_hfc_chcfg_ch4[] = {
{54, 606, grp_0}, /* ACH 0 */
{0, 0, grp_0}, /* ACH 1 */
{54, 606, grp_0}, /* ACH 2 */
{0, 0, grp_0}, /* ACH 3 */
{54, 606, grp_0}, /* ACH 4 */
{0, 0, grp_0}, /* ACH 5 */
{54, 606, grp_0}, /* ACH 6 */
{0, 0, grp_0}, /* ACH 7 */
{54, 606, grp_0}, /* B0MGQ */
{0, 0, grp_0}, /* B0HIQ */
{54, 606, grp_0}, /* B1MGQ */
{0, 0, grp_0}, /* B1HIQ */
{0, 0, 0}, /* FWCMDQ */
{0, 0, 0}, /* BMC */
{0, 0, 0}, /* H2D */
};
static const struct rtw89_hfc_pub_cfg rtw8922a_hfc_pubcfg_p4 = {
876, /* Group 0 */
0, /* Group 1 */
876, /* Public Max */
0, /* WP threshold */
};
static const struct rtw89_hfc_ch_cfg rtw8922a_hfc_chcfg_ch5[] = {
{54, 311, grp_0}, /* ACH 0 */
{0, 0, grp_0}, /* ACH 1 */
{54, 311, grp_0}, /* ACH 2 */
{0, 0, grp_0}, /* ACH 3 */
{54, 311, grp_1}, /* ACH 4 */
{0, 0, grp_1}, /* ACH 5 */
{54, 311, grp_1}, /* ACH 6 */
{0, 0, grp_1}, /* ACH 7 */
{54, 311, grp_0}, /* B0MGQ */
{0, 0, grp_0}, /* B0HIQ */
{54, 311, grp_1}, /* B1MGQ */
{0, 0, grp_0}, /* B1HIQ */
{0, 0, 0}, /* FWCMDQ */
{0, 0, 0}, /* BMC */
{0, 0, 0}, /* H2D */
};
static const struct rtw89_hfc_pub_cfg rtw8922a_hfc_pubcfg_p5 = {
419, /* Group 0 */
419, /* Group 1 */
838, /* Public Max */
0, /* WP threshold */
};
static const struct rtw89_hfc_param_ini rtw8922a_hfc_param_ini_usb3[] = {
[RTW89_QTA_SCC] = {rtw8922a_hfc_chcfg_ch4, &rtw8922a_hfc_pubcfg_p4,
&rtw89_mac_size.hfc_prec_cfg_c3, RTW89_HCIFC_STF},
[RTW89_QTA_DBCC] = {rtw8922a_hfc_chcfg_ch5, &rtw8922a_hfc_pubcfg_p5,
&rtw89_mac_size.hfc_prec_cfg_c3, RTW89_HCIFC_STF},
[RTW89_QTA_DLFW] = {NULL, NULL, &rtw89_mac_size.hfc_prec_cfg_c2,
RTW89_HCIFC_POH},
[RTW89_QTA_INVALID] = {NULL},
};
static const struct rtw89_dle_mem rtw8922a_dle_mem_pcie[] = {
[RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size0_v1,
&rtw89_mac_size.ple_size0_v1, &rtw89_mac_size.wde_qt0_v1,
@ -2969,7 +3089,10 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
.max_rx_agg_num = 64,
.dis_2g_40m_ul_ofdma = false,
.rsvd_ple_ofst = 0x8f800,
.hfc_param_ini = {rtw8922a_hfc_param_ini_pcie, NULL, NULL, NULL},
.hfc_param_ini = {rtw8922a_hfc_param_ini_pcie,
rtw8922a_hfc_param_ini_usb2,
rtw8922a_hfc_param_ini_usb3,
NULL},
.dle_mem = {rtw8922a_dle_mem_pcie, NULL, NULL, NULL},
.wde_qempty_acq_grpnum = 4,
.wde_qempty_mgq_grpsel = 4,