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Merge branch 'support-multi-channel-irqs-in-stmmac-platform-drivers'
Jan Petrous says:
====================
Support multi-channel IRQs in stmmac platform drivers
The stmmac core supports two interrupt modes, controlled by the
flag STMMAC_FLAG_MULTI_MSI_EN:
- When the flag is set, the driver uses multi-channel IRQ mode (Multi-IRQ).
- Otherwise, a single IRQ line is requested (aka MAC-IRQ):
static int stmmac_request_irq(struct net_device *dev)
{
/* Request the IRQ lines */
if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN)
ret = stmmac_request_irq_multi_msi(dev);
else
ret = stmmac_request_irq_single(dev);
}
At present, only PCI drivers (Intel and Loongson) make use of the Multi-IRQ
mode. This concept can be extended to DT-based embedded glue drivers
(dwmac-xxx.c).
This series adds support for reading per-channel IRQs from the DT node
and reuses the existing STMMAC_FLAG_MULTI_MSI_EN flag to enable multi-IRQ
operation in platform drivers.
The final decision if Multi-IRQ gets enabled remains on glue driver
to allow implementing any reguirements/limitions the focused platform
needs.
NXP S32G2/S32G3/S32R SoCs integrate the DWMAC IP with multi-channel
interrupt support. The dwmac-s32.c driver change is provided as an example of
enabling multi-IRQ mode for non-PCI drivers.
====================
Link: https://patch.msgid.link/20260313-dwmac_multi_irq-v12-0-b5c9d0aa13d6@oss.nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
a91b5d44d5
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@ -1,5 +1,5 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright 2021-2024 NXP
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# Copyright 2021-2026 NXP
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml#
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@ -16,6 +16,8 @@ description:
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the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII
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interface over Pinctrl device or the output can be routed
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to the embedded SerDes for SGMII connectivity.
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The DWMAC instances have connected all RX/TX queues interrupts,
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enabling load balancing of data traffic across all CPU cores.
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properties:
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compatible:
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@ -45,10 +47,25 @@ properties:
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FlexTimer Modules connect to GMAC_0.
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interrupts:
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maxItems: 1
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minItems: 1
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maxItems: 11
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interrupt-names:
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const: macirq
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oneOf:
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- items:
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- const: macirq
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- items:
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- const: macirq
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- const: tx-queue-0
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- const: rx-queue-0
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- const: tx-queue-1
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- const: rx-queue-1
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- const: tx-queue-2
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- const: rx-queue-2
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- const: tx-queue-3
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- const: rx-queue-3
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- const: tx-queue-4
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- const: rx-queue-4
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clocks:
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items:
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@ -88,8 +105,28 @@ examples:
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<0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */
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nxp,phy-sel = <&gpr 0x4>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
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/* CHN 0: tx, rx */
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
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/* CHN 1: tx, rx */
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<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
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/* CHN 2: tx, rx */
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<GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
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/* CHN 3: tx, rx */
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<GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
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/* CHN 4: tx, rx */
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<GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq",
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"tx-queue-0", "rx-queue-0",
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"tx-queue-1", "rx-queue-1",
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"tx-queue-2", "rx-queue-2",
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"tx-queue-3", "rx-queue-3",
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"tx-queue-4", "rx-queue-4";
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snps,mtl-rx-config = <&mtl_rx_setup>;
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snps,mtl-tx-config = <&mtl_tx_setup>;
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clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>;
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@ -2,7 +2,7 @@
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/*
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* NXP S32G/R GMAC glue layer
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*
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* Copyright 2019-2024 NXP
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* Copyright 2019-2026 NXP
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*
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*/
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@ -110,6 +110,37 @@ static void s32_gmac_exit(struct device *dev, void *priv)
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clk_disable_unprepare(gmac->rx_clk);
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}
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static void s32_gmac_setup_multi_irq(struct device *dev,
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struct plat_stmmacenet_data *plat,
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struct stmmac_resources *res)
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{
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int i;
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/* RX IRQs */
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for (i = 0; i < plat->rx_queues_to_use; i++) {
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if (res->rx_irq[i] <= 0) {
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dev_dbg(dev, "Missing RX queue %d interrupt\n", i);
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goto mac_irq_mode;
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}
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}
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/* TX IRQs */
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for (i = 0; i < plat->tx_queues_to_use; i++) {
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if (res->tx_irq[i] <= 0) {
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dev_dbg(dev, "Missing TX queue %d interrupt\n", i);
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goto mac_irq_mode;
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}
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}
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plat->flags |= STMMAC_FLAG_MULTI_MSI_EN;
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dev_info(dev, "Multi-IRQ mode (per queue IRQs) selected\n");
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return;
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mac_irq_mode:
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plat->flags &= ~STMMAC_FLAG_MULTI_MSI_EN;
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dev_info(dev, "MAC IRQ mode selected\n");
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}
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static int s32_dwmac_probe(struct platform_device *pdev)
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{
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struct plat_stmmacenet_data *plat;
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@ -165,6 +196,9 @@ static int s32_dwmac_probe(struct platform_device *pdev)
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plat->core_type = DWMAC_CORE_GMAC4;
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plat->pmt = true;
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plat->flags |= STMMAC_FLAG_SPH_DISABLE;
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s32_gmac_setup_multi_irq(dev, plat, &res);
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plat->rx_fifo_size = 20480;
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plat->tx_fifo_size = 20480;
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@ -695,9 +695,47 @@ struct clk *stmmac_pltfr_find_clk(struct plat_stmmacenet_data *plat_dat,
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}
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EXPORT_SYMBOL_GPL(stmmac_pltfr_find_clk);
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/**
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* stmmac_pltfr_get_irq_array - Read per-channel IRQs from platform device
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* @pdev: platform device
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* @fmt: IRQ name format string (e.g., "tx-queue-%d")
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* @irqs: array to store IRQ numbers
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* @num: maximum number of IRQs to read
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*
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* Return: 0 on success, -EPROBE_DEFER if IRQ is deferred, -EINVAL on error.
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* Missing IRQs are set to 0 and iteration stops at first missing IRQ.
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*/
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static int stmmac_pltfr_get_irq_array(struct platform_device *pdev,
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const char *fmt, int *irqs, size_t num)
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{
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char name[16];
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int i;
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for (i = 0; i < num; i++) {
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if (snprintf(name, sizeof(name), fmt, i) >= sizeof(name))
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return -EINVAL;
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irqs[i] = platform_get_irq_byname_optional(pdev, name);
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if (irqs[i] == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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if (irqs[i] <= 0) {
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dev_dbg(&pdev->dev, "IRQ %s not found\n", name);
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/* Stop silently on first unset irq */
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irqs[i] = 0;
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break;
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}
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}
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return 0;
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}
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int stmmac_get_platform_resources(struct platform_device *pdev,
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struct stmmac_resources *stmmac_res)
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{
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int ret;
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memset(stmmac_res, 0, sizeof(*stmmac_res));
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/* Get IRQ information early to have an ability to ask for deferred
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@ -733,7 +771,24 @@ int stmmac_get_platform_resources(struct platform_device *pdev,
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stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0);
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return PTR_ERR_OR_ZERO(stmmac_res->addr);
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if (IS_ERR(stmmac_res->addr))
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return PTR_ERR(stmmac_res->addr);
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/* TX channels irq */
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ret = stmmac_pltfr_get_irq_array(pdev, "tx-queue-%d",
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stmmac_res->tx_irq,
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MTL_MAX_TX_QUEUES);
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if (ret)
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return ret;
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/* RX channels irq */
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ret = stmmac_pltfr_get_irq_array(pdev, "rx-queue-%d",
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stmmac_res->rx_irq,
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MTL_MAX_RX_QUEUES);
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if (ret)
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return ret;
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return 0;
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}
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EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
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