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drm/msm: Add PERFCNTR_CONFIG ioctl
Add new UABI and implementation of PERFCNTR_CONFIG ioctl. A bit more work is required to configure the pwrup_reglist for the GMU to restore SELect regs on exit of IFPC, before we can stop disabling IFPC while global counter collection. This will follow in a later commit, but will be transparent to userspace. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Reviewed-by: Anna Maniscalco <anna.maniscalco2000@gmail.com> Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/728217/ Message-ID: <20260526145137.160554-14-robin.clark@oss.qualcomm.com>
This commit is contained in:
Rob Clark
parent
5ef26a2a4b
commit
a7b378c949
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@ -801,6 +801,7 @@ static const struct drm_ioctl_desc msm_ioctls[] = {
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DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_CLOSE, msm_ioctl_submitqueue_close, DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_QUERY, msm_ioctl_submitqueue_query, DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(MSM_VM_BIND, msm_ioctl_vm_bind, DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(MSM_PERFCNTR_CONFIG, msm_ioctl_perfcntr_config, DRM_RENDER_ALLOW),
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};
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static void msm_show_fdinfo(struct drm_printer *p, struct drm_file *file)
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@ -237,6 +237,8 @@ int msm_ioctl_vm_bind(struct drm_device *dev, void *data,
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int msm_perfcntr_resume(struct msm_gpu *gpu);
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void msm_perfcntr_suspend(struct msm_gpu *gpu);
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int msm_ioctl_perfcntr_config(struct drm_device *dev, void *data,
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struct drm_file *file);
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struct msm_perfcntr_state * msm_perfcntr_init(struct msm_gpu *gpu);
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void msm_perfcntr_cleanup(struct msm_gpu *gpu);
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@ -353,6 +353,9 @@ struct msm_perfcntr_state {
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/** @stream: current global counter stream if active */
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struct msm_perfcntr_stream *stream;
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/** @sel_seqno: counter for sel_fence */
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uint32_t sel_seqno;
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/**
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* @groups: Global perfcntr stream group state.
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*
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@ -3,13 +3,44 @@
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#include "drm/drm_file.h"
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#include "drm/msm_drm.h"
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#include "linux/anon_inodes.h"
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#include "linux/gfp_types.h"
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#include "linux/poll.h"
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#include "linux/slab.h"
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#include "msm_drv.h"
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#include "msm_gpu.h"
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#include "msm_perfcntr.h"
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#include "adreno/adreno_gpu.h"
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/* space used: */
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#define fifo_count(stream) \
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(CIRC_CNT((stream)->fifo.head, (stream)->fifo.tail, (stream)->fifo_size))
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#define fifo_count_to_end(stream) \
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(CIRC_CNT_TO_END(smp_load_acquire(&(stream)->fifo.head), (stream)->fifo.tail, (stream)->fifo_size))
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/* space available: */
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#define fifo_space(stream) \
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(CIRC_SPACE((stream)->fifo.head, (stream)->fifo.tail, (stream)->fifo_size))
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static int
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msm_perfcntr_resume_locked(struct msm_perfcntr_stream *stream)
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{
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if (!stream)
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return 0;
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/* Reprogram SEL regs on highest priority rb: */
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struct msm_ringbuffer *ring = stream->gpu->rb[0];
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queue_work(ring->sched.submit_wq, &stream->sel_work);
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hrtimer_start(&stream->sample_timer,
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ns_to_ktime(stream->sample_period_ns),
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HRTIMER_MODE_REL_PINNED);
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return 0;
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}
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@ -25,6 +56,22 @@ msm_perfcntr_resume(struct msm_gpu *gpu)
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static void
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msm_perfcntr_suspend_locked(struct msm_perfcntr_stream *stream)
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{
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if (!stream)
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return;
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hrtimer_cancel(&stream->sample_timer);
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kthread_cancel_work_sync(&stream->sample_work);
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/*
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* We can't use cancel_work_sync() here, since sel_work acquires
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* gpu->lock which (a) in suspend path can already be held, or
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* (b) in release path would invert the order of gpu->lock and
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* gpu->perfcntr_lock. Either would cause deadlock.
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*/
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cancel_work(&stream->sel_work);
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stream->sel_fence = ++stream->gpu->perfcntrs->sel_seqno;
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stream->seqno = 0;
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}
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void
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@ -36,6 +83,488 @@ msm_perfcntr_suspend(struct msm_gpu *gpu)
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msm_perfcntr_suspend_locked(gpu->perfcntrs->stream);
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}
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static int
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msm_perfcntrs_stream_release(struct inode *inode, struct file *file)
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{
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struct msm_perfcntr_stream *stream = file->private_data;
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struct msm_gpu *gpu = stream->gpu;
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scoped_guard (mutex, &gpu->perfcntr_lock) {
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struct msm_perfcntr_state *perfcntrs = gpu->perfcntrs;
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msm_perfcntr_suspend_locked(stream);
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perfcntrs->stream = NULL;
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/* release previously allocated counters: */
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for (unsigned i = 0; i < gpu->num_perfcntr_groups; i++)
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perfcntrs->groups[i]->allocated_counters = 0;
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}
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/*
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* In the suspend path we use async cancel_work(), to avoid blocking
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* on sel_work, which acquires gpu->lock (which could deadlock since
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* other paths acquire gpu->lock before perfcntr_lock) or already
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* hold gpu->lock.
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*
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* But since we are freeing the stream, after dropping perfcntr_lock
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* we need to block until sel_work is done:
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*/
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cancel_work_sync(&stream->sel_work);
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kfree(stream->group_idx);
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kfree(stream->fifo.buf);
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kfree(stream);
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return 0;
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}
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static __poll_t
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msm_perfcntrs_stream_poll(struct file *file, poll_table *wait)
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{
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struct msm_perfcntr_stream *stream = file->private_data;
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__poll_t events = 0;
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poll_wait(file, &stream->poll_wq, wait);
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/* Are there samples to read? */
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if (fifo_count(stream) > 0)
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events |= EPOLLIN;
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return events;
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}
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static ssize_t
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msm_perfcntrs_stream_read(struct file *file, char __user *buf,
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size_t count, loff_t *ppos)
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{
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struct msm_perfcntr_stream *stream = file->private_data;
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int ret;
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if (!(file->f_flags & O_NONBLOCK)) {
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ret = wait_event_interruptible(stream->poll_wq,
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fifo_count(stream) > 0);
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if (ret)
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return ret;
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}
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guard(mutex)(&stream->read_lock);
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struct circ_buf *fifo = &stream->fifo;
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const char *fptr = &fifo->buf[fifo->tail];
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count = min_t(size_t, count, fifo_count_to_end(stream));
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if (!count)
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return -EAGAIN;
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if (copy_to_user(buf, fptr, count))
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return -EFAULT;
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smp_store_release(&fifo->tail, (fifo->tail + count) & (stream->fifo_size - 1));
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*ppos += count;
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return count;
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}
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static const struct file_operations stream_fops = {
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.owner = THIS_MODULE,
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.release = msm_perfcntrs_stream_release,
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.poll = msm_perfcntrs_stream_poll,
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.read = msm_perfcntrs_stream_read,
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};
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static void
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sel_worker(struct work_struct *w)
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{
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struct msm_perfcntr_stream *stream =
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container_of(w, typeof(*stream), sel_work);
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struct msm_gpu *gpu = stream->gpu;
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/* Reprogram SEL regs on highest priority rb: */
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struct msm_ringbuffer *ring = stream->gpu->rb[0];
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/*
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* If in the process of resuming, wait for that. Otherwise sel_worker
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* which is enqueued in the resume path can be scheduled before the
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* resume completes.
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*/
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pm_runtime_barrier(&gpu->pdev->dev);
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/*
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* sel_work could end up scheduled before suspend, but running
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* after. See msm_perfcntr_suspend_locked()
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*
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* So if we end up running sel_work after the GPU is already
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* suspended, just bail. It will be scheduled again after
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* the GPU is resumed.
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*/
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if (!pm_runtime_get_if_active(&gpu->pdev->dev))
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return;
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scoped_guard (mutex, &gpu->lock) {
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guard(mutex)(&gpu->perfcntr_lock);
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if (stream == gpu->perfcntrs->stream) {
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msm_gpu_hw_init(gpu);
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gpu->funcs->perfcntr_configure(gpu, ring, stream);
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}
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}
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pm_runtime_put_autosuspend(&gpu->pdev->dev);
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}
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static void
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sample_write(struct msm_perfcntr_stream *stream, int *head, const void *buf, size_t sz)
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{
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/*
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* FIFO size is power-of-two, and guaranteed to have enough space to
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* fit what we are writing. So we should not hit the wrap-around
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* point writing things that are power-of-two sized
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*/
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WARN_ON(CIRC_SPACE_TO_END(*head, stream->fifo.tail, stream->fifo_size) < sz);
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memcpy(&stream->fifo.buf[*head], buf, sz);
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/* Advance head, wrapping around if necessary: */
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*head = (*head + sz) & (stream->fifo_size - 1);
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}
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static void
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sample_write_u32(struct msm_perfcntr_stream *stream, int *head, uint32_t val)
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{
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sample_write(stream, head, &val, sizeof(val));
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}
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static void
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sample_write_u64(struct msm_perfcntr_stream *stream, int *head, uint64_t val)
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{
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sample_write(stream, head, &val, sizeof(val));
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}
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static void
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sample_worker(struct kthread_work *work)
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{
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struct msm_perfcntr_stream *stream =
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container_of(work, typeof(*stream), sample_work);
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struct msm_gpu *gpu = stream->gpu;
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struct msm_rbmemptrs *memptrs = gpu->rb[0]->memptrs;
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if (memptrs->perfcntr_fence != stream->sel_fence)
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return;
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/*
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* Ensure we have enough space to capture a sample period's
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* worth of data:
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*/
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if (stream->period_size > fifo_space(stream)) {
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stream->seqno = 0;
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return;
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}
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if (gpu->funcs->perfcntr_flush)
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gpu->funcs->perfcntr_flush(gpu);
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/* Keep local copy of head to avoid updating fifo until the end: */
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int head = stream->fifo.head;
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/*
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* We expect the GPU to be powered at this point, as the timer
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* and kthread work are canceled/flushed in the suspend path:
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*/
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sample_write_u64(stream, &head,
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to_adreno_gpu(gpu)->funcs->get_timestamp(gpu));
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sample_write_u32(stream, &head, stream->seqno++);
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sample_write_u32(stream, &head, 0);
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for (unsigned i = 0; i < stream->nr_groups; i++) {
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unsigned group_idx = msm_perfcntr_group_idx(stream, i);
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unsigned base = msm_perfcntr_counter_base(stream, group_idx);
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const struct msm_perfcntr_group *group =
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&gpu->perfcntr_groups[group_idx];
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struct msm_perfcntr_group_state *group_state =
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gpu->perfcntrs->groups[group_idx];
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unsigned nr = group_state->allocated_counters;
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for (unsigned j = 0; j < nr; j++) {
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const struct msm_perfcntr_counter *counter =
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&group->counters[j + base];
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uint64_t val = gpu_read64(gpu, counter->counter_reg_lo);
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sample_write_u64(stream, &head, val);
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}
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}
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smp_store_release(&stream->fifo.head, head);
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wake_up_all(&stream->poll_wq);
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}
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static enum hrtimer_restart
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sample_timer(struct hrtimer *hrtimer)
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{
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struct msm_perfcntr_stream *stream =
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container_of(hrtimer, typeof(*stream), sample_timer);
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kthread_queue_work(stream->gpu->worker, &stream->sample_work);
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hrtimer_forward_now(hrtimer, ns_to_ktime(stream->sample_period_ns));
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return HRTIMER_RESTART;
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}
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static int
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get_group_idx(struct msm_gpu *gpu, const char *name, size_t len)
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{
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for (unsigned i = 0; i < gpu->num_perfcntr_groups; i++) {
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const struct msm_perfcntr_group *group =
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&gpu->perfcntr_groups[i];
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if (!strncmp(group->name, name, len))
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return i;
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}
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return -1;
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}
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static int
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get_available_counters(struct msm_gpu *gpu, int group_idx, uint32_t flags)
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{
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struct msm_perfcntr_state *perfcntrs = gpu->perfcntrs;
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/*
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* For local counter reservation, anything that is not used by
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* global perfcntr stream is available:
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*/
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if (!(flags & MSM_PERFCNTR_STREAM)) {
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return gpu->perfcntr_groups[group_idx].num_counters -
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perfcntrs->groups[group_idx]->allocated_counters;
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}
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/*
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* For global counter collection, anything that is not reserved by
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* one or more contexts is available:
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*/
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guard(mutex)(&gpu->dev->filelist_mutex);
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unsigned reserved_counters = 0;
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struct drm_file *file;
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list_for_each_entry (file, &gpu->dev->filelist, lhead) {
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struct msm_context *ctx = file->driver_priv;
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if (!ctx || !ctx->perfctx)
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continue;
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unsigned n = ctx->perfctx->reserved_counters[group_idx];
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reserved_counters = max(reserved_counters, n);
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}
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return gpu->perfcntr_groups[group_idx].num_counters - reserved_counters;
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}
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int
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msm_ioctl_perfcntr_config(struct drm_device *dev, void *data, struct drm_file *file)
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{
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struct msm_drm_private *priv = dev->dev_private;
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const struct drm_msm_perfcntr_config *args = data;
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struct msm_context *ctx = file->driver_priv;
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struct msm_gpu *gpu = priv->gpu;
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int stream_fd = 0;
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if (!gpu || !gpu->num_perfcntr_groups)
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return -ENXIO;
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struct msm_perfcntr_state *perfcntrs = gpu->perfcntrs;
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/*
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* Validate args that don't require locks/power first:
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*/
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if (args->flags & ~MSM_PERFCNTR_FLAGS)
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return UERR(EINVAL, dev, "invalid flags");
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if (args->nr_groups && !args->group_stride)
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return UERR(EINVAL, dev, "invalid group_stride");
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if (args->nr_groups > gpu->num_perfcntr_groups)
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return UERR(EINVAL, dev, "too many groups");
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if (args->nr_groups && !args->groups)
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return UERR(EINVAL, dev, "no groups");
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if (args->flags & MSM_PERFCNTR_STREAM) {
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if (!perfmon_capable())
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return UERR(EPERM, dev, "invalid permissions");
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if (!args->nr_groups)
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return UERR(EINVAL, dev, "invalid nr_groups");
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if (!args->period)
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return UERR(EINVAL, dev, "invalid sampling period");
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if (args->bufsz_shift > const_ilog2(SZ_128M))
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return UERR(EINVAL, dev, "buffer size too big (>128M)");
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} else {
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if (args->period)
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return UERR(EINVAL, dev, "sampling period not allowed");
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if (args->bufsz_shift)
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return UERR(EINVAL, dev, "sample buf size not allowed");
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}
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/*
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* To avoid iterating over the groups multiple times, allocate and setup
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* both a ctx and global stream object. Only one of the two will be
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* kept in the end.
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*/
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struct msm_perfcntr_context_state *perfctx __free(kfree) = kzalloc(
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struct_size(perfctx, reserved_counters, gpu->num_perfcntr_groups),
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GFP_KERNEL);
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if (!perfctx)
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return -ENOMEM;
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struct msm_perfcntr_stream *stream __free(kfree) = kzalloc_obj(*stream);
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if (!stream)
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return -ENOMEM;
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|
||||
uint8_t *nr_counters __free(kfree) = kzalloc_objs(uint8_t, gpu->num_perfcntr_groups);
|
||||
if (!nr_counters)
|
||||
return -ENOMEM;
|
||||
|
||||
uint32_t *group_idx __free(kfree) = kzalloc_objs(uint32_t, args->nr_groups);
|
||||
if (!group_idx)
|
||||
return -ENOMEM;
|
||||
|
||||
stream->gpu = gpu;
|
||||
stream->sample_period_ns = args->period;
|
||||
stream->nr_groups = args->nr_groups;
|
||||
stream->fifo_size = 1ull << args->bufsz_shift;
|
||||
|
||||
mutex_init(&stream->read_lock);
|
||||
|
||||
guard(mutex)(&gpu->perfcntr_lock);
|
||||
|
||||
if (args->flags & MSM_PERFCNTR_STREAM) {
|
||||
if (perfcntrs->stream)
|
||||
return UERR(EBUSY, dev, "perfcntr stream already open");
|
||||
}
|
||||
|
||||
size_t bufsz = 16; /* header size includes seqno and 64b timestamp: */
|
||||
int ret = 0;
|
||||
|
||||
for (unsigned i = 0; i < args->nr_groups; i++) {
|
||||
struct drm_msm_perfcntr_group g = {0};
|
||||
size_t sz = min_t(size_t, args->group_stride, sizeof(g));
|
||||
void __user *userptr =
|
||||
u64_to_user_ptr(args->groups + (i * args->group_stride));
|
||||
|
||||
if (copy_from_user(&g, userptr, sz))
|
||||
return -EFAULT;
|
||||
|
||||
if (g.pad)
|
||||
return UERR(EINVAL, dev, "groups[%d]: invalid pad", i);
|
||||
|
||||
int idx = get_group_idx(gpu, g.group_name, sizeof(g.group_name));
|
||||
|
||||
if (idx < 0)
|
||||
return UERR(EINVAL, dev, "groups[%d]: unknown group", i);
|
||||
|
||||
if (nr_counters[idx])
|
||||
return UERR(EINVAL, dev, "groups[%d]: duplicate group", i);
|
||||
|
||||
if (g.nr_countables > gpu->perfcntr_groups[idx].num_counters)
|
||||
return UERR(EINVAL, dev, "groups[%d]: too many counters", i);
|
||||
|
||||
if (args->flags & MSM_PERFCNTR_STREAM) {
|
||||
if (g.nr_countables && !g.countables)
|
||||
return UERR(EINVAL, dev, "groups[%d]: no countables", i);
|
||||
} else {
|
||||
if (g.countables)
|
||||
return UERR(EINVAL, dev, "groups[%d]: countables should be NULL", i);
|
||||
}
|
||||
|
||||
int avail_counters = get_available_counters(gpu, idx, args->flags);
|
||||
if (g.nr_countables > avail_counters) {
|
||||
/*
|
||||
* Defer error return until we process all groups, in
|
||||
* case there are other E2BIG groups:
|
||||
*/
|
||||
ret = UERR(E2BIG, dev, "groups[%d]: too few counters available", i);
|
||||
|
||||
if (args->flags & MSM_PERFCNTR_UPDATE) {
|
||||
/* Let userspace know how many counters are actually avail: */
|
||||
g.nr_countables = avail_counters;
|
||||
if (copy_to_user(userptr, &g, sz))
|
||||
return -EFAULT;
|
||||
}
|
||||
}
|
||||
|
||||
group_idx[i] = idx;
|
||||
perfctx->reserved_counters[idx] = g.nr_countables;
|
||||
|
||||
/* +1 to catch duplicate zero sized groups: */
|
||||
nr_counters[idx] = g.nr_countables + 1;
|
||||
|
||||
if (args->flags & MSM_PERFCNTR_STREAM) {
|
||||
size_t sz = sizeof(uint32_t) * g.nr_countables;
|
||||
void __user *userptr = u64_to_user_ptr(g.countables);
|
||||
|
||||
if (copy_from_user(perfcntrs->groups[idx]->countables, userptr, sz))
|
||||
return -EFAULT;
|
||||
|
||||
/* Samples are 64b per countable: */
|
||||
bufsz += 2 * sz;
|
||||
}
|
||||
}
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (args->flags & MSM_PERFCNTR_STREAM) {
|
||||
/*
|
||||
* Validate requested buffer size is large enough for at least
|
||||
* a single sample period.
|
||||
*
|
||||
* Note the circ_buf implementation needs to be 1 byte larger
|
||||
* than max it can hold (see CIRC_SPACE()).
|
||||
*/
|
||||
if (stream->fifo_size <= bufsz)
|
||||
return UERR(EINVAL, dev, "required buffer size: %zu", bufsz);
|
||||
|
||||
/* There aren't enough counters to hit this limit: */
|
||||
WARN_ON(bufsz > SZ_128M);
|
||||
|
||||
stream->period_size = bufsz;
|
||||
|
||||
void *buf __free(kfree) = kmalloc(stream->fifo_size, GFP_KERNEL);
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
|
||||
FD_PREPARE(fdf, O_CLOEXEC,
|
||||
anon_inode_getfile("[msm_perfcntrs]", &stream_fops, stream, 0));
|
||||
if (fdf.err)
|
||||
return fdf.err;
|
||||
|
||||
INIT_WORK(&stream->sel_work, sel_worker);
|
||||
kthread_init_work(&stream->sample_work, sample_worker);
|
||||
init_waitqueue_head(&stream->poll_wq);
|
||||
hrtimer_setup(&stream->sample_timer, sample_timer,
|
||||
CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
||||
|
||||
stream->sel_fence = ++perfcntrs->sel_seqno;
|
||||
stream->group_idx = no_free_ptr(group_idx);
|
||||
stream->fifo.buf = no_free_ptr(buf);
|
||||
|
||||
/* commit the allocated counters, subtracting off original +1: */
|
||||
for (unsigned i = 0; i < gpu->num_perfcntr_groups; i++)
|
||||
perfcntrs->groups[i]->allocated_counters = nr_counters[i] - 1;
|
||||
|
||||
perfcntrs->stream = no_free_ptr(stream);
|
||||
|
||||
msm_perfcntr_resume_locked(perfcntrs->stream);
|
||||
|
||||
stream_fd = fd_publish(fdf);
|
||||
} else {
|
||||
kfree(ctx->perfctx);
|
||||
ctx->perfctx = no_free_ptr(perfctx);
|
||||
}
|
||||
|
||||
return stream_fd;
|
||||
}
|
||||
|
||||
/**
|
||||
* msm_perfcntr_group_idx - map idx of perfcntr group to group_idx
|
||||
* @stream: The global perfcntr stream
|
||||
|
|
|
|||
|
|
@ -7,6 +7,11 @@
|
|||
#define __MSM_PERFCNTR_H__
|
||||
|
||||
#include "linux/array_size.h"
|
||||
#include "linux/circ_buf.h"
|
||||
#include "linux/hrtimer.h"
|
||||
#include "linux/kthread.h"
|
||||
#include "linux/wait.h"
|
||||
#include "linux/workqueue.h"
|
||||
|
||||
#include "adreno_common.xml.h"
|
||||
|
||||
|
|
@ -42,12 +47,49 @@ struct msm_perfcntr_stream {
|
|||
/** @gpu: Back-link to the GPU */
|
||||
struct msm_gpu *gpu;
|
||||
|
||||
/** @sample_timer: Timer to sample counters */
|
||||
struct hrtimer sample_timer;
|
||||
|
||||
/** @poll_wq: Wait queue for waiting for OA data to be available */
|
||||
wait_queue_head_t poll_wq;
|
||||
|
||||
/** @sample_period_ns: Sampling period */
|
||||
uint64_t sample_period_ns;
|
||||
|
||||
/** @nr_groups: # of counter groups with enabled counters */
|
||||
uint32_t nr_groups;
|
||||
|
||||
/** @seqno: counter for collected samples */
|
||||
uint32_t seqno;
|
||||
|
||||
/** @sel_fence: Fence for SEL reg programming */
|
||||
uint32_t sel_fence;
|
||||
|
||||
/**
|
||||
* @sel_work: Worker for SEL reg programming
|
||||
*
|
||||
* Initial SEL reg programming (as opposed to restoring the SEL
|
||||
* regs on runpm resume) must run on the same ordered wq as is
|
||||
* used by drm_sched, to serialize it with GEM_SUBMITs written
|
||||
* into the same ringbuffer.
|
||||
*/
|
||||
struct work_struct sel_work;
|
||||
|
||||
/**
|
||||
* @sample_work: Worker for collecting samples
|
||||
*/
|
||||
struct kthread_work sample_work;
|
||||
|
||||
/**
|
||||
* @read_lock:
|
||||
*
|
||||
* Fifo access is synchronied on the producer side by virtue
|
||||
* of there being a single timer collecting samples and writing
|
||||
* into the fifo. It is protected on the consumer side by
|
||||
* @read_lock.
|
||||
*/
|
||||
struct mutex read_lock;
|
||||
|
||||
/**
|
||||
* @group_idx: array of nr_groups
|
||||
*
|
||||
|
|
@ -56,6 +98,15 @@ struct msm_perfcntr_stream {
|
|||
* the ioctl call that setup the stream
|
||||
*/
|
||||
uint32_t *group_idx;
|
||||
|
||||
/** @fifo: circular buffer for samples */
|
||||
struct circ_buf fifo;
|
||||
|
||||
/** @fifo_size: circular buffer size */
|
||||
size_t fifo_size;
|
||||
|
||||
/** @period_size: size of data for single sampling period */
|
||||
size_t period_size;
|
||||
};
|
||||
|
||||
uint32_t msm_perfcntr_group_idx(const struct msm_perfcntr_stream *stream, uint32_t n);
|
||||
|
|
|
|||
|
|
@ -491,6 +491,52 @@ struct drm_msm_submitqueue_query {
|
|||
__u32 pad;
|
||||
};
|
||||
|
||||
#define MSM_PERFCNTR_STREAM 0x00000001
|
||||
#define MSM_PERFCNTR_UPDATE 0x00000002
|
||||
#define MSM_PERFCNTR_FLAGS ( \
|
||||
MSM_PERFCNTR_STREAM | \
|
||||
MSM_PERFCNTR_UPDATE | \
|
||||
0)
|
||||
|
||||
struct drm_msm_perfcntr_group {
|
||||
char group_name[16];
|
||||
__u32 nr_countables;
|
||||
__u32 pad; /* mbz */
|
||||
__u64 countables; /* pointer to an array of nr_countables u32 */
|
||||
};
|
||||
|
||||
/*
|
||||
* Note, for MSM_PERFCNTR_STREAM, the ioctl returns an fd to read recorded
|
||||
* counters. This only works because the ioctl is DRM_IOW(), if we returned
|
||||
* a out param in the ioctl struct the copy_to_user() (in drm_ioctl())
|
||||
* could fault, causing us to leak the fd.
|
||||
*
|
||||
* If the ioctl returns with error E2BIG, that means more counters/countables
|
||||
* are requested than are currently available. If MSM_PERFCNTR_UPDATE flag
|
||||
* is set, drm_msm_perfcntr_group::nr_countables will be updated to return
|
||||
* the actual # of counters available.
|
||||
*
|
||||
* The data read from the has the following format for each sampling period:
|
||||
*
|
||||
* uint64_t timestamp; // CP_ALWAYS_ON_COUNTER captured at sample time
|
||||
* uint32_t seqno; // increments by 1 each period, reset to 0 on discontinuity
|
||||
* uint32_t mbz; // pad out counters to 64b
|
||||
* struct {
|
||||
* uint64_t counter[nr_countables];
|
||||
* } groups[nr_groups];
|
||||
*
|
||||
* The ordering of groups and counters matches the order in PERFCNTR_CONFIG
|
||||
* ioctl.
|
||||
*/
|
||||
struct drm_msm_perfcntr_config {
|
||||
__u32 flags; /* bitmask of MSM_PERFCNTR_x */
|
||||
__u32 nr_groups; /* # of entries in groups array */
|
||||
__u64 groups; /* pointer to array of drm_msm_perfcntr_group */
|
||||
__u64 period; /* sampling period in ns */
|
||||
__u32 bufsz_shift; /* sample buffer size in bytes is 1<<bufsz_shift */
|
||||
__u32 group_stride; /* sizeof(struct drm_msm_perfcntr_group) */
|
||||
};
|
||||
|
||||
#define DRM_MSM_GET_PARAM 0x00
|
||||
#define DRM_MSM_SET_PARAM 0x01
|
||||
#define DRM_MSM_GEM_NEW 0x02
|
||||
|
|
@ -507,6 +553,7 @@ struct drm_msm_submitqueue_query {
|
|||
#define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B
|
||||
#define DRM_MSM_SUBMITQUEUE_QUERY 0x0C
|
||||
#define DRM_MSM_VM_BIND 0x0D
|
||||
#define DRM_MSM_PERFCNTR_CONFIG 0x0E
|
||||
|
||||
#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
|
||||
#define DRM_IOCTL_MSM_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SET_PARAM, struct drm_msm_param)
|
||||
|
|
@ -521,6 +568,7 @@ struct drm_msm_submitqueue_query {
|
|||
#define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
|
||||
#define DRM_IOCTL_MSM_SUBMITQUEUE_QUERY DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_QUERY, struct drm_msm_submitqueue_query)
|
||||
#define DRM_IOCTL_MSM_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_VM_BIND, struct drm_msm_vm_bind)
|
||||
#define DRM_IOCTL_MSM_PERFCNTR_CONFIG DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_PERFCNTR_CONFIG, struct drm_msm_perfcntr_config)
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user