MediaTek mach ARM32 updates

This adds support for the MediaTek MT6572 SoC, found in various
 old smartphones and tablets from various manufacturers.
 
 In particular, this adds a board_dt_compat entry for this SoC
 and its SMP bring up sequence to enable secondary cores.
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Merge tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

MediaTek mach ARM32 updates

This adds support for the MediaTek MT6572 SoC, found in various
old smartphones and tablets from various manufacturers.

In particular, this adds a board_dt_compat entry for this SoC
and its SMP bring up sequence to enable secondary cores.

* tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
  ARM: dts: mediatek: add basic support for Lenovo A369i board
  ARM: dts: mediatek: add basic support for JTY D101 board
  ARM: dts: mediatek: add basic support for MT6572 SoC
  dt-bindings: arm: mediatek: add boards based on the MT6572 SoC
  dt-bindings: vendor-prefixes: add JTY
  dt-bindings: watchdog: mediatek,mtk-wdt: add MT6572
  dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: add MT6572

Link: https://lore.kernel.org/r/20250711083656.33538-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-07-21 17:06:24 +02:00
commit a6942926a3
8 changed files with 236 additions and 0 deletions

View File

@ -27,6 +27,11 @@ properties:
- enum:
- mediatek,mt2712-evb
- const: mediatek,mt2712
- items:
- enum:
- jty,d101
- lenovo,a369i
- const: mediatek,mt6572
- items:
- enum:
- mediatek,mt6580-evbp1

View File

@ -21,6 +21,7 @@ properties:
- enum:
- mediatek,mt2701-sysirq
- mediatek,mt2712-sysirq
- mediatek,mt6572-sysirq
- mediatek,mt6580-sysirq
- mediatek,mt6582-sysirq
- mediatek,mt6589-sysirq

View File

@ -786,6 +786,8 @@ patternProperties:
description: Jide Tech
"^joz,.*":
description: JOZ BV
"^jty,.*":
description: JTY
"^kam,.*":
description: Kamstrup A/S
"^karo,.*":

View File

@ -34,6 +34,7 @@ properties:
- items:
- enum:
- mediatek,mt2701-wdt
- mediatek,mt6572-wdt
- mediatek,mt6582-wdt
- mediatek,mt6797-wdt
- mediatek,mt7622-wdt

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@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt2701-evb.dtb \
mt6572-jty-d101.dtb \
mt6572-lenovo-a369i.dtb \
mt6580-evbp1.dtb \
mt6582-prestigio-pmt5008-3g.dtb \
mt6589-aquaris5.dtb \

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@ -0,0 +1,61 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2025 Max Shevchenko <wctrl@proton.me>
*/
/dts-v1/;
#include "mt6572.dtsi"
/ {
model = "JTY D101";
compatible = "jty,d101", "mediatek,mt6572";
aliases {
serial0 = &uart0;
};
chosen {
#address-cells = <1>;
#size-cells = <1>;
stdout-path = "serial0:921600n8";
framebuffer: framebuffer@bf400000 {
compatible = "simple-framebuffer";
memory-region = <&framebuffer_reserved>;
width = <1024>;
height = <600>;
stride = <(1024 * 2)>;
format = "r5g6b5";
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
connsys@80000000 {
reg = <0x80000000 0x100000>;
no-map;
};
modem@be000000 {
reg = <0xbe000000 0x1400000>;
no-map;
};
framebuffer_reserved: framebuffer@bf400000 {
reg = <0xbf400000 0xc00000>;
no-map;
};
};
};
&uart0 {
status = "okay";
};

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@ -0,0 +1,56 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2025 Max Shevchenko <wctrl@proton.me>
*/
/dts-v1/;
#include "mt6572.dtsi"
/ {
model = "Lenovo A369i";
compatible = "lenovo,a369i", "mediatek,mt6572";
aliases {
serial0 = &uart0;
};
chosen {
#address-cells = <1>;
#size-cells = <1>;
stdout-path = "serial0:921600n8";
framebuffer: framebuffer@9fa00000 {
compatible = "simple-framebuffer";
memory-region = <&framebuffer_reserved>;
width = <480>;
height = <800>;
stride = <(480 * 2)>;
format = "r5g6b5";
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
connsys@80000000 {
reg = <0x80000000 0x100000>;
no-map;
};
framebuffer_reserved: framebuffer@9fa00000 {
reg = <0x9fa00000 0x600000>;
no-map;
};
};
};
&uart0 {
status = "okay";
};

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@ -0,0 +1,108 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2025 Max Shevchenko <wctrl@proton.me>
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&sysirq>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "mediatek,mt6589-smp";
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x1>;
};
};
uart_clk: dummy26m {
compatible = "fixed-clock";
clock-frequency = <26000000>;
#clock-cells = <0>;
};
system_clk: dummy13m {
compatible = "fixed-clock";
clock-frequency = <13000000>;
#clock-cells = <0>;
};
rtc_clk: dummy32k {
compatible = "fixed-clock";
clock-frequency = <32000>;
#clock-cells = <0>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
watchdog: watchdog@10007000 {
compatible = "mediatek,mt6572-wdt", "mediatek,mt6589-wdt";
reg = <0x10007000 0x100>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_LOW>;
timeout-sec = <15>;
#reset-cells = <1>;
};
timer: timer@10008000 {
compatible = "mediatek,mt6572-timer", "mediatek,mt6577-timer";
reg = <0x10008000 0x80>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_LOW>;
clocks = <&system_clk>, <&rtc_clk>;
clock-names = "system-clk", "rtc-clk";
};
sysirq: interrupt-controller@10200100 {
compatible = "mediatek,mt6572-sysirq", "mediatek,mt6577-sysirq";
reg = <0x10200100 0x1c>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
};
gic: interrupt-controller@10211000 {
compatible = "arm,cortex-a7-gic";
reg = <0x10211000 0x1000>,
<0x10212000 0x2000>,
<0x10214000 0x2000>,
<0x10216000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
};
uart0: serial@11005000 {
compatible = "mediatek,mt6572-uart", "mediatek,mt6577-uart";
reg = <0x11005000 0x400>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
clock-names = "baud";
status = "disabled";
};
uart1: serial@11006000 {
compatible = "mediatek,mt6572-uart", "mediatek,mt6577-uart";
reg = <0x11006000 0x400>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
clock-names = "baud";
status = "disabled";
};
};
};