Merge branch 'net-dsa-mt7530-add-econet-en7528-built-in-switch-support'

Ahmed Naseef says:

====================
net: dsa: mt7530: add EcoNet EN7528 built-in switch support

The EcoNet EN7528 is a MIPS SoC whose platform support is already
upstream. It integrates an MT7530 switch, memory-mapped like the built-in
switches of the MediaTek MT7988 and Airoha EN7581/AN7583 SoCs, but with a
true MT7530 core, four Gigabit PHYs on ports 1-4 and a CPU port at a fixed
1000 Mbps full duplex link.

Patch 1 documents the compatible, patch 2 adds the driver support.
====================

Link: https://patch.msgid.link/cover.1783770059.git.naseefkm@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2026-07-22 14:05:01 -07:00
commit a653401685
4 changed files with 57 additions and 8 deletions

View File

@ -100,6 +100,10 @@ properties:
Built-in switch of the Airoha AN7583 SoC
const: airoha,an7583-switch
- description:
Built-in switch of the EcoNet EN7528 SoC
const: econet,en7528-switch
reg:
maxItems: 1
@ -318,6 +322,7 @@ allOf:
- mediatek,mt7988-switch
- airoha,en7581-switch
- airoha,an7583-switch
- econet,en7528-switch
then:
$ref: "#/$defs/builtin-dsa-port"
properties:

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@ -12,6 +12,7 @@
static const struct of_device_id mt7988_of_match[] = {
{ .compatible = "airoha,an7583-switch", .data = &mt753x_table[ID_AN7583], },
{ .compatible = "airoha,en7581-switch", .data = &mt753x_table[ID_EN7581], },
{ .compatible = "econet,en7528-switch", .data = &mt753x_table[ID_EN7528], },
{ .compatible = "mediatek,mt7988-switch", .data = &mt753x_table[ID_MT7988], },
{ /* sentinel */ },
};

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@ -2912,6 +2912,30 @@ static void en7581_mac_port_get_caps(struct dsa_switch *ds, int port,
}
}
static void en7528_mac_port_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
switch (port) {
/* Ports which are connected to switch PHYs. There is no MII pinout. */
case 1 ... 4:
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
config->supported_interfaces);
config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
break;
/* Port 6 is connected to SoC's GMAC at 1000 Mbps full duplex. There
* is no MII pinout.
*/
case 6:
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
config->supported_interfaces);
config->mac_capabilities |= MAC_1000FD;
break;
}
}
static void
mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
@ -3101,17 +3125,24 @@ static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
struct mt7530_priv *priv = ds->priv;
u32 eeecr;
config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE;
config->lpi_capabilities = MAC_100FD | MAC_1000FD | MAC_2500FD;
eeecr = mt7530_read(priv, MT753X_PMEEECR_P(port));
/* tx_lpi_timer should be in microseconds. The time units for
* LPI threshold are unspecified.
/* The EN7528 GPHYs report EEE capability, but negotiating EEE with
* common link partners (e.g. Realtek GbE NICs) results in an unstable
* link with dropped frames. Leave the LPI capabilities empty so that
* phylink disables EEE on these PHYs and refuses to enable it from
* userspace.
*/
config->lpi_timer_default = FIELD_GET(LPI_THRESH_MASK, eeecr);
if (priv->id != ID_EN7528) {
u32 eeecr = mt7530_read(priv, MT753X_PMEEECR_P(port));
config->lpi_capabilities = MAC_100FD | MAC_1000FD | MAC_2500FD;
/* tx_lpi_timer should be in microseconds. The time units for
* LPI threshold are unspecified.
*/
config->lpi_timer_default = FIELD_GET(LPI_THRESH_MASK, eeecr);
}
priv->info->mac_port_get_caps(ds, port, config);
}
@ -3254,7 +3285,8 @@ mt753x_conduit_state_change(struct dsa_switch *ds,
* forwarded to the numerically smallest CPU port whose conduit
* interface is up.
*/
if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
if (priv->id != ID_MT7530 && priv->id != ID_MT7621 &&
priv->id != ID_EN7528)
return;
mask = BIT(cpu_dp->index);
@ -3459,6 +3491,16 @@ const struct mt753x_info mt753x_table[] = {
.phy_write_c45 = mt7531_ind_c45_phy_write,
.mac_port_get_caps = en7581_mac_port_get_caps,
},
[ID_EN7528] = {
.id = ID_EN7528,
.pcs_ops = &mt7530_pcs_ops,
.sw_setup = mt7988_setup,
.phy_read_c22 = mt7531_ind_c22_phy_read,
.phy_write_c22 = mt7531_ind_c22_phy_write,
.phy_read_c45 = mt7531_ind_c45_phy_read,
.phy_write_c45 = mt7531_ind_c45_phy_write,
.mac_port_get_caps = en7528_mac_port_get_caps,
},
};
EXPORT_SYMBOL_GPL(mt753x_table);

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@ -21,6 +21,7 @@ enum mt753x_id {
ID_MT7988 = 3,
ID_EN7581 = 4,
ID_AN7583 = 5,
ID_EN7528 = 6,
};
#define NUM_TRGMII_CTRL 5