mirror of
https://github.com/torvalds/linux.git
synced 2026-11-07 06:17:02 +01:00
perf: Enhance perf_reg_validate() with simd_enabled argument
The upcoming patch will support x86 APX eGPRs sampling by using the reclaimed XMM register space to represent eGPRs in sample_regs_* fields. To differentiate between XMM and eGPRs in sample_regs_* fields, an additional argument, simd_enabled, is introduced to the perf_reg_validate() helper. If simd_enabled is set to 1, it indicates that eGPRs are represented in sample_regs_* fields for the x86 platform; otherwise, XMM registers are represented. Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20260824082731.1013973-18-dapeng1.mi@linux.intel.com
This commit is contained in:
parent
74d55a827e
commit
a2c64c74c0
|
|
@ -18,7 +18,7 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
|
||||||
|
|
||||||
#define REG_RESERVED (~((1ULL << PERF_REG_ARM_MAX) - 1))
|
#define REG_RESERVED (~((1ULL << PERF_REG_ARM_MAX) - 1))
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
if (!mask || mask & REG_RESERVED)
|
if (!mask || mask & REG_RESERVED)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -77,7 +77,7 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
|
||||||
|
|
||||||
#define REG_RESERVED (~((1ULL << PERF_REG_ARM64_MAX) - 1))
|
#define REG_RESERVED (~((1ULL << PERF_REG_ARM64_MAX) - 1))
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
u64 reserved_mask = REG_RESERVED;
|
u64 reserved_mask = REG_RESERVED;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -18,7 +18,7 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
|
||||||
|
|
||||||
#define REG_RESERVED (~((1ULL << PERF_REG_CSKY_MAX) - 1))
|
#define REG_RESERVED (~((1ULL << PERF_REG_CSKY_MAX) - 1))
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
if (!mask || mask & REG_RESERVED)
|
if (!mask || mask & REG_RESERVED)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -25,7 +25,7 @@ u64 perf_reg_abi(struct task_struct *tsk)
|
||||||
}
|
}
|
||||||
#endif /* CONFIG_32BIT */
|
#endif /* CONFIG_32BIT */
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
if (!mask)
|
if (!mask)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -28,7 +28,7 @@ u64 perf_reg_abi(struct task_struct *tsk)
|
||||||
}
|
}
|
||||||
#endif /* CONFIG_32BIT */
|
#endif /* CONFIG_32BIT */
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
if (!mask)
|
if (!mask)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -34,7 +34,7 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
|
||||||
|
|
||||||
#define REG_RESERVED (~((1ULL << PERF_REG_PARISC_MAX) - 1))
|
#define REG_RESERVED (~((1ULL << PERF_REG_PARISC_MAX) - 1))
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
if (!mask || mask & REG_RESERVED)
|
if (!mask || mask & REG_RESERVED)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -125,7 +125,7 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
|
||||||
return regs_get_register(regs, pt_regs_offset[idx]);
|
return regs_get_register(regs, pt_regs_offset[idx]);
|
||||||
}
|
}
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
if (!mask || mask & REG_RESERVED)
|
if (!mask || mask & REG_RESERVED)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -18,7 +18,7 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
|
||||||
|
|
||||||
#define REG_RESERVED (~((1ULL << PERF_REG_RISCV_MAX) - 1))
|
#define REG_RESERVED (~((1ULL << PERF_REG_RISCV_MAX) - 1))
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
if (!mask || mask & REG_RESERVED)
|
if (!mask || mask & REG_RESERVED)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -34,7 +34,7 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
|
||||||
|
|
||||||
#define REG_RESERVED (~((1UL << PERF_REG_S390_MAX) - 1))
|
#define REG_RESERVED (~((1UL << PERF_REG_S390_MAX) - 1))
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
if (!mask || mask & REG_RESERVED)
|
if (!mask || mask & REG_RESERVED)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -198,7 +198,7 @@ int perf_simd_reg_validate(u16 vec_qwords, u64 vec_mask,
|
||||||
(1ULL << PERF_REG_X86_R14) | \
|
(1ULL << PERF_REG_X86_R14) | \
|
||||||
(1ULL << PERF_REG_X86_R15))
|
(1ULL << PERF_REG_X86_R15))
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
/* The mask could be 0 if only the SIMD registers are interested */
|
/* The mask could be 0 if only the SIMD registers are interested */
|
||||||
if (mask & (REG_NOSUPPORT | PERF_REG_X86_RESERVED))
|
if (mask & (REG_NOSUPPORT | PERF_REG_X86_RESERVED))
|
||||||
|
|
@ -218,7 +218,7 @@ u64 perf_reg_abi(struct task_struct *task)
|
||||||
(1ULL << PERF_REG_X86_FS) | \
|
(1ULL << PERF_REG_X86_FS) | \
|
||||||
(1ULL << PERF_REG_X86_GS))
|
(1ULL << PERF_REG_X86_GS))
|
||||||
|
|
||||||
int perf_reg_validate(u64 mask)
|
int perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
/* The mask could be 0 if only the SIMD registers are interested */
|
/* The mask could be 0 if only the SIMD registers are interested */
|
||||||
if (mask & (REG_NOSUPPORT | PERF_REG_X86_RESERVED))
|
if (mask & (REG_NOSUPPORT | PERF_REG_X86_RESERVED))
|
||||||
|
|
|
||||||
|
|
@ -10,7 +10,7 @@ struct perf_regs {
|
||||||
};
|
};
|
||||||
|
|
||||||
u64 perf_reg_value(struct pt_regs *regs, int idx);
|
u64 perf_reg_value(struct pt_regs *regs, int idx);
|
||||||
int perf_reg_validate(u64 mask);
|
int perf_reg_validate(u64 mask, bool simd_enabled);
|
||||||
u64 perf_reg_abi(struct task_struct *task);
|
u64 perf_reg_abi(struct task_struct *task);
|
||||||
void perf_get_regs_user(struct perf_regs *regs_user,
|
void perf_get_regs_user(struct perf_regs *regs_user,
|
||||||
struct pt_regs *regs);
|
struct pt_regs *regs);
|
||||||
|
|
|
||||||
|
|
@ -7823,7 +7823,7 @@ u64 __weak perf_reg_value(struct pt_regs *regs, int idx)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int __weak perf_reg_validate(u64 mask)
|
int __weak perf_reg_validate(u64 mask, bool simd_enabled)
|
||||||
{
|
{
|
||||||
return mask ? -ENOSYS : 0;
|
return mask ? -ENOSYS : 0;
|
||||||
}
|
}
|
||||||
|
|
@ -13804,7 +13804,8 @@ static int perf_copy_attr(struct perf_event_attr __user *uattr,
|
||||||
}
|
}
|
||||||
|
|
||||||
if (attr->sample_type & PERF_SAMPLE_REGS_USER) {
|
if (attr->sample_type & PERF_SAMPLE_REGS_USER) {
|
||||||
ret = perf_reg_validate(attr->sample_regs_user);
|
ret = perf_reg_validate(attr->sample_regs_user,
|
||||||
|
attr->sample_simd_regs_enabled);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
if (attr->sample_simd_regs_enabled) {
|
if (attr->sample_simd_regs_enabled) {
|
||||||
|
|
@ -13836,7 +13837,8 @@ static int perf_copy_attr(struct perf_event_attr __user *uattr,
|
||||||
attr->sample_max_stack = sysctl_perf_event_max_stack;
|
attr->sample_max_stack = sysctl_perf_event_max_stack;
|
||||||
|
|
||||||
if (attr->sample_type & PERF_SAMPLE_REGS_INTR) {
|
if (attr->sample_type & PERF_SAMPLE_REGS_INTR) {
|
||||||
ret = perf_reg_validate(attr->sample_regs_intr);
|
ret = perf_reg_validate(attr->sample_regs_intr,
|
||||||
|
attr->sample_simd_regs_enabled);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
if (attr->sample_simd_regs_enabled) {
|
if (attr->sample_simd_regs_enabled) {
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue
Block a user