mirror of
https://github.com/torvalds/linux.git
synced 2026-07-28 01:55:51 +02:00
drm/amdgpu: Switch to gfx_v12_1_get_xccs_per_xcp
Use gfx v12_1 callback to query the numbers of xccs per xcp Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
1e5d97a5c5
commit
a0702a514f
|
|
@ -718,10 +718,19 @@ static void gfx_v12_1_select_me_pipe_q(struct amdgpu_device *adev,
|
|||
soc_v1_0_grbm_select(adev, me, pipe, q, vm, GET_INST(GC, xcc_id));
|
||||
}
|
||||
|
||||
#define regGFX_IMU_PARTITION_SWITCH 0x5f8c
|
||||
#define regGFX_IMU_PARTITION_SWITCH_BASE_IDX 1
|
||||
#define GFX_IMU_PARTITION_SWITCH__TOTAL_XCCS_IN_XCP__SHIFT 0x2
|
||||
#define GFX_IMU_PARTITION_SWITCH__TOTAL_XCCS_IN_XCP_MASK 0x0000003CL
|
||||
|
||||
static int gfx_v12_1_get_xccs_per_xcp(struct amdgpu_device *adev)
|
||||
{
|
||||
/* Fill this in when the interface is ready */
|
||||
return 1;
|
||||
u32 reg_data;
|
||||
|
||||
/* the register data is expected to be the same on all instances */
|
||||
reg_data = RREG32_SOC15(GC, GET_INST(GC, 0), regGFX_IMU_PARTITION_SWITCH);
|
||||
|
||||
return REG_GET_FIELD(reg_data, GFX_IMU_PARTITION_SWITCH, TOTAL_XCCS_IN_XCP);
|
||||
}
|
||||
|
||||
static int gfx_v12_1_ih_to_xcc_inst(struct amdgpu_device *adev, int ih_node)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user