arm64: dts: arm/corstone1000: Move FVP peripherals to separate .dtsi

The FVPs have a common set of peripherals specific to the FVP. Move
these to a separate .dtsi so they can be shared across FVP platforms.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Message-Id: <20260320-dt-corstone1000-a320-v1-4-a549dfcfe8da@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
This commit is contained in:
Rob Herring (Arm) 2026-03-20 11:47:17 -05:00 committed by Sudeep Holla
parent 903528ac23
commit 9c3904f94f
2 changed files with 45 additions and 35 deletions

View File

@ -8,46 +8,12 @@
/dts-v1/;
#include "corstone1000.dtsi"
#include "corstone1000-fvp.dtsi"
/ {
model = "ARM Corstone1000 FVP (Fixed Virtual Platform)";
compatible = "arm,corstone1000-fvp";
smsc: ethernet@4010000 {
compatible = "smsc,lan91c111";
reg = <0x40100000 0x10000>;
phy-mode = "mii";
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <2>;
};
vmmc_v3_3d: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc_supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
sdmmc0: mmc@40300000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x40300000 0x1000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <12000000>;
vmmc-supply = <&vmmc_v3_3d>;
clocks = <&smbclk>, <&refclk100mhz>;
clock-names = "smclk", "apb_pclk";
};
sdmmc1: mmc@50000000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x50000000 0x10000>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <12000000>;
vmmc-supply = <&vmmc_v3_3d>;
clocks = <&smbclk>, <&refclk100mhz>;
clock-names = "smclk", "apb_pclk";
};
cpus: cpus {
#address-cells = <2>;
#size-cells = <0>;

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@ -0,0 +1,44 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (c) 2022, Arm Limited. All rights reserved.
* Copyright (c) 2022, Linaro Limited. All rights reserved.
*
*/
/ {
smsc: ethernet@4010000 {
compatible = "smsc,lan91c111";
reg = <0x40100000 0x10000>;
phy-mode = "mii";
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <2>;
};
vmmc_v3_3d: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc_supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
sdmmc0: mmc@40300000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x40300000 0x1000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <12000000>;
vmmc-supply = <&vmmc_v3_3d>;
clocks = <&smbclk>, <&refclk100mhz>;
clock-names = "smclk", "apb_pclk";
};
sdmmc1: mmc@50000000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x50000000 0x10000>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <12000000>;
vmmc-supply = <&vmmc_v3_3d>;
clocks = <&smbclk>, <&refclk100mhz>;
clock-names = "smclk", "apb_pclk";
};
};