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clk: qcom: rcg2: Remove support for update_src_map

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The commit eb325c3d2a90 ("clk: qcom: clk-rcg2: Read RCG source before
calculating clk rate")' had introduced a function to update the src map,
but there could be a race where a set_rate for a clock from a particular
CC on a CPU could override the global cxo_f which was set by clock
enable/disable for a clock from another CC.

Change-Id: Id86818895e226a387e7fd1a09e2034eee18fd361
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This commit is contained in:
Taniya Das 2019-01-07 15:38:50 +05:30 committed by Mike Tipton
parent 0980686087
commit 9c20337119
1 changed files with 0 additions and 28 deletions
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28
drivers/clk/qcom/clk-rcg2.c
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@ -69,16 +69,6 @@ static struct freq_tbl cxo_f = {
.n = 0,
};
static void update_src_map(struct clk_hw *hw)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
int i, num_parents = clk_hw_get_num_parents(hw);
for (i = 0; i < num_parents; i++)
if (!rcg->parent_map[i].cfg)
cxo_f.src = rcg->parent_map[i].src;
}
static int clk_rcg2_is_enabled(struct clk_hw *hw)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
@ -459,12 +449,6 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate,
if (!f)
return -EINVAL;
/*
* Set the correct source value for CXO as per
* as per defined parent map.
*/
update_src_map(hw);
/*
* Return if the RCG is currently disabled. This configuration update
* will happen as part of the RCG enable sequence.
@ -625,12 +609,6 @@ static int clk_rcg2_enable(struct clk_hw *hw)
unsigned long rate;
const struct freq_tbl *f;
/*
* Set the correct source value for CXO as per
* as per defined parent map.
*/
update_src_map(hw);
if (rcg->flags & FORCE_ENABLE_RCG) {
clk_rcg2_set_force_enable(hw);
return 0;
@ -672,12 +650,6 @@ static void clk_rcg2_disable(struct clk_hw *hw)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
/*
* Set the correct source value for CXO as per
* as per defined parent map.
*/
update_src_map(hw);
if (rcg->flags & FORCE_ENABLE_RCG) {
clk_rcg2_clear_force_enable(hw);
return;