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arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable PCIe
Enable the PCIE1 slot which is connected to PCIe0 channel. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260708163311.222176-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -384,6 +384,18 @@ &ostm7 {
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status = "okay";
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};
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&pcie0 {
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pinctrl-0 = <&pcie0_pins>;
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pinctrl-names = "default";
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num-lanes = <4>;
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status = "okay";
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};
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&pcie_port0 {
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clocks = <&versa3 5>;
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clock-names = "ref";
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};
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&pinctrl {
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eth0_pins: eth0 {
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pins = "ET0_TXC_TXCLK";
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@ -430,6 +442,12 @@ i2c8_pins: i2c8 {
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<RZV2H_PORT_PINMUX(0, 7, 1)>; /* I2C8_SCL */
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};
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pcie0_pins: pcie0 {
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pins = "PCIE0_RSTOUTB";
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slew-rate = <0>;
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renesas,output-impedance = <2>;
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};
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scif_pins: scif {
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pins = "SCIF_TXD", "SCIF_RXD";
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renesas,output-impedance = <1>;
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