arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable PCIe

Enable the PCIE1 slot which is connected to PCIe0 channel.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260708163311.222176-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2026-07-08 17:33:11 +01:00 committed by Geert Uytterhoeven
parent c73b080d1d
commit 90a9d595f3

View File

@ -384,6 +384,18 @@ &ostm7 {
status = "okay";
};
&pcie0 {
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
num-lanes = <4>;
status = "okay";
};
&pcie_port0 {
clocks = <&versa3 5>;
clock-names = "ref";
};
&pinctrl {
eth0_pins: eth0 {
pins = "ET0_TXC_TXCLK";
@ -430,6 +442,12 @@ i2c8_pins: i2c8 {
<RZV2H_PORT_PINMUX(0, 7, 1)>; /* I2C8_SCL */
};
pcie0_pins: pcie0 {
pins = "PCIE0_RSTOUTB";
slew-rate = <0>;
renesas,output-impedance = <2>;
};
scif_pins: scif {
pins = "SCIF_TXD", "SCIF_RXD";
renesas,output-impedance = <1>;