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arm64: dts: renesas: r9a09g057: Add PCIe nodes

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Add PCIe nodes to Renesas RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260708163311.222176-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2026-07-08 17:33:10 +01:00 committed by Geert Uytterhoeven
parent f4f9b372a8
commit c73b080d1d
1 changed files with 140 additions and 0 deletions
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140
arch/arm64/boot/dts/renesas/r9a09g057.dtsi
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@ -1041,6 +1041,146 @@ rsci9: serial@12803000 {
status = "disabled";
};
pcie0: pcie@13400000 {
compatible = "renesas,r9a09g057-pcie";
reg = <0 0x13400000 0 0x10000>;
ranges = <0x02000000 0x0 0x30000000 0x0 0x30000000 0x0 0x08000000>,
<0x43000000 0x4 0x40000000 0x4 0x40000000 0x6 0x00000000>;
dma-ranges = <0x43000000 0x0 0x40000000 0x0 0x40000000 0x4 0x00000000>;
bus-range = <0x0 0xff>;
interrupts = <GIC_SPI 800 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 801 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 802 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 806 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 792 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 794 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 796 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 807 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 798 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 808 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 809 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 812 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 813 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "serr", "serr_cor", "serr_nonfatal",
"serr_fatal", "axi_err", "inta",
"intb", "intc", "intd", "msi",
"link_bandwidth", "pm_pme", "dma",
"pcie_evt", "msg", "all",
"link_equalization_request",
"turn_off_event", "pmu_poweroff",
"d3_event_f0", "d3_event_f1",
"cfg_pmcsr_writeclear_f0",
"cfg_pmcsr_writeclear_f1";
#interrupt-cells = <1>;
interrupt-controller;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie0 0 0 0 0>, /* INTA */
<0 0 0 2 &pcie0 0 0 0 1>, /* INTB */
<0 0 0 3 &pcie0 0 0 0 2>, /* INTC */
<0 0 0 4 &pcie0 0 0 0 3>; /* INTD */
clocks = <&cpg CPG_MOD 0xc4>, <&cpg CPG_MOD 0xc5>;
clock-names = "aclk", "pmu";
resets = <&cpg 0xb2>;
reset-names = "aresetn";
power-domains = <&cpg>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
num-lanes = <2>;
renesas,sysc = <&sys 0>;
status = "disabled";
pcie_port0: pcie@0,0 {
reg = <0x0 0x0 0x0 0x0 0x0>;
ranges;
device_type = "pci";
vendor-id = <0x1912>;
device-id = <0x003b>;
#address-cells = <3>;
#size-cells = <2>;
};
};
pcie1: pcie@13410000 {
compatible = "renesas,r9a09g057-pcie";
reg = <0 0x13410000 0 0x10000>;
ranges = <0x02000000 0x0 0x38000000 0x0 0x38000000 0x0 0x08000000>,
<0x43000000 0xa 0x40000000 0xa 0x40000000 0x5 0xc0000000>;
dma-ranges = <0x43000000 0x0 0x40000000 0x0 0x40000000 0x4 0x00000000>;
bus-range = <0x0 0xff>;
interrupts = <GIC_SPI 823 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 824 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 826 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 829 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 815 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 816 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 818 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 819 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 820 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 827 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 828 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 830 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 814 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 821 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 831 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 833 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 834 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 835 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "serr", "serr_cor", "serr_nonfatal",
"serr_fatal", "axi_err", "inta",
"intb", "intc", "intd", "msi",
"link_bandwidth", "pm_pme", "dma",
"pcie_evt", "msg", "all",
"link_equalization_request",
"turn_off_event", "pmu_poweroff",
"d3_event_f0", "d3_event_f1",
"cfg_pmcsr_writeclear_f0",
"cfg_pmcsr_writeclear_f1";
#interrupt-cells = <1>;
interrupt-controller;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1 0 0 0 0>, /* INTA */
<0 0 0 2 &pcie1 0 0 0 1>, /* INTB */
<0 0 0 3 &pcie1 0 0 0 2>, /* INTC */
<0 0 0 4 &pcie1 0 0 0 3>; /* INTD */
clocks = <&cpg CPG_MOD 0xc4>, <&cpg CPG_MOD 0xc5>;
clock-names = "aclk", "pmu";
resets = <&cpg 0xb2>;
reset-names = "aresetn";
power-domains = <&cpg>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
num-lanes = <2>;
renesas,sysc = <&sys 1>;
status = "disabled";
pcie_port1: pcie@0,0 {
reg = <0x0 0x0 0x0 0x0 0x0>;
ranges;
device_type = "pci";
vendor-id = <0x1912>;
device-id = <0x003b>;
#address-cells = <3>;
#size-cells = <2>;
};
};
i2c0: i2c@14400400 {
compatible = "renesas,riic-r9a09g057";
reg = <0 0x14400400 0 0x400>;