github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-25 15:41:52 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

drm/amd/display: Fix dsc eDP issue

Browse Source 
[why]
Need to add function hook check before use

Reviewed-by: Mohit Bawa <mohit.bawa@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Charlene Liu 2025-12-10 17:01:17 -05:00 committed by Alex Deucher
parent c979d8db7b
commit 878a4b73c1
1 changed files with 9 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
View File

@ -1846,6 +1846,9 @@ static void disable_vga_and_power_gate_all_controllers(
struct timing_generator *tg;
struct dc_context *ctx = dc->ctx;
if (dc->caps.ips_support)
return;
for (i = 0; i < dc->res_pool->timing_generator_count; i++) {
tg = dc->res_pool->timing_generators[i];
@ -1922,13 +1925,16 @@ static void clean_up_dsc_blocks(struct dc *dc)
/* disable DSC in OPTC */
if (i < dc->res_pool->timing_generator_count) {
tg = dc->res_pool->timing_generators[i];
tg->funcs->set_dsc_config(tg, OPTC_DSC_DISABLED, 0, 0);
if (tg->funcs->set_dsc_config)
tg->funcs->set_dsc_config(tg, OPTC_DSC_DISABLED, 0, 0);
}
/* disable DSC in stream encoder */
if (i < dc->res_pool->stream_enc_count) {
se = dc->res_pool->stream_enc[i];
se->funcs->dp_set_dsc_config(se, OPTC_DSC_DISABLED, 0, 0);
se->funcs->dp_set_dsc_pps_info_packet(se, false, NULL, true);
if (se->funcs->dp_set_dsc_config)
se->funcs->dp_set_dsc_config(se, OPTC_DSC_DISABLED, 0, 0);
if (se->funcs->dp_set_dsc_pps_info_packet)
se->funcs->dp_set_dsc_pps_info_packet(se, false, NULL, true);
}
/* disable DSC block */
if (dccg->funcs->set_ref_dscclk)