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drm/amd/display: Add signal type check for dcn401 get_phyd32clk_src

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Trying to access link enc on a dpia link will cause a crash otherwise

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2025-12-10 15:52:39 -05:00 committed by Alex Deucher
parent 0d2abc0291
commit c979d8db7b
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
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@ -914,10 +914,10 @@ static void dcn401_enable_stream_calc(
pipe_ctx->stream->link->cur_link_settings.lane_count;
uint32_t active_total_with_borders;
if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx))
if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {
*dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
*phyd32clk = get_phyd32clk_src(pipe_ctx->stream->link);
*phyd32clk = get_phyd32clk_src(pipe_ctx->stream->link);
}
if (dc_is_tmds_signal(pipe_ctx->stream->signal))
dcn401_calculate_dccg_tmds_div_value(pipe_ctx, tmds_div);