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ASoC: ab8500: Validate and program TDM slots correctly
The interface clock ratio is selected from the slot count alone, ffs()
and fls() produce one-based hardware slot numbers, eight-channel mode
does not program any mappings, and all register errors are ignored.
Invalid masks can also leave a partially programmed interface.
Validate the complete configuration first, derive the supported BCLK
ratio from slots times slot width, use zero-based slot indices, program
deterministic eight-channel maps, and propagate register failures.
Fixes: 679d7abdc7 ("ASoC: codecs: Add AB8500 codec-driver")
Assisted-by: LLM
Signed-off-by: Linus Walleij <linusw@kernel.org>
Link: https://patch.msgid.link/20260831-ab8500-codec-fixes-v1-4-f85024e717e3@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Linus Walleij
Mark Brown
parent
f98785adf0
commit
85cef7e200
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@ -1880,23 +1880,27 @@ static int ab8500_codec_set_dai_tdm_slot(struct snd_soc_dai *dai,
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int slots, int slot_width)
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{
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struct snd_soc_component *component = dai->component;
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unsigned int val, mask, slot, slots_active;
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unsigned int active_mask, clock_ratio, slot, value, ad_out, reg;
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unsigned int tx_active, rx_active;
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unsigned int conf1_val, conf2_val;
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unsigned int mask;
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int channel, ret;
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mask = BIT(AB8500_DIGIFCONF2_IF0WL0) |
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BIT(AB8500_DIGIFCONF2_IF0WL1);
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val = 0;
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conf2_val = 0;
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switch (slot_width) {
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case 16:
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break;
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case 20:
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val |= BIT(AB8500_DIGIFCONF2_IF0WL0);
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conf2_val |= BIT(AB8500_DIGIFCONF2_IF0WL0);
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break;
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case 24:
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val |= BIT(AB8500_DIGIFCONF2_IF0WL1);
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conf2_val |= BIT(AB8500_DIGIFCONF2_IF0WL1);
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break;
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case 32:
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val |= BIT(AB8500_DIGIFCONF2_IF0WL1) |
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conf2_val |= BIT(AB8500_DIGIFCONF2_IF0WL1) |
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BIT(AB8500_DIGIFCONF2_IF0WL0);
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break;
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default:
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@ -1905,27 +1909,11 @@ static int ab8500_codec_set_dai_tdm_slot(struct snd_soc_dai *dai,
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return -EINVAL;
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}
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dev_dbg(dai->component->dev, "%s: IF0 slot-width: %d bits.\n",
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__func__, slot_width);
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snd_soc_component_update_bits(component, AB8500_DIGIFCONF2, mask, val);
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/* Setup TDM clocking according to slot count */
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dev_dbg(dai->component->dev, "%s: Slots, total: %d\n", __func__, slots);
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mask = BIT(AB8500_DIGIFCONF1_IF0BITCLKOS0) |
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BIT(AB8500_DIGIFCONF1_IF0BITCLKOS1);
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switch (slots) {
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case 2:
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val = AB8500_MASK_NONE;
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break;
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case 4:
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val = BIT(AB8500_DIGIFCONF1_IF0BITCLKOS0);
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break;
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case 8:
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val = BIT(AB8500_DIGIFCONF1_IF0BITCLKOS1);
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break;
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case 16:
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val = BIT(AB8500_DIGIFCONF1_IF0BITCLKOS0) |
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BIT(AB8500_DIGIFCONF1_IF0BITCLKOS1);
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break;
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default:
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dev_err(dai->component->dev,
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@ -1933,94 +1921,136 @@ static int ab8500_codec_set_dai_tdm_slot(struct snd_soc_dai *dai,
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__func__, slots);
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return -EINVAL;
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}
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snd_soc_component_update_bits(component, AB8500_DIGIFCONF1, mask, val);
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/* Setup TDM DA according to active tx slots */
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if (tx_mask & ~0xff)
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return -EINVAL;
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mask = AB8500_DASLOTCONFX_SLTODAX_MASK;
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tx_mask = tx_mask << AB8500_DA_DATA0_OFFSET;
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slots_active = hweight32(tx_mask);
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dev_dbg(dai->component->dev, "%s: Slots, active, TX: %d\n", __func__,
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slots_active);
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switch (slots_active) {
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case 0:
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clock_ratio = slots * slot_width;
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switch (clock_ratio) {
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case 32:
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conf1_val = 0;
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break;
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case 1:
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slot = ffs(tx_mask);
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snd_soc_component_update_bits(component, AB8500_DASLOTCONF1, mask, slot);
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snd_soc_component_update_bits(component, AB8500_DASLOTCONF3, mask, slot);
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snd_soc_component_update_bits(component, AB8500_DASLOTCONF2, mask, slot);
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snd_soc_component_update_bits(component, AB8500_DASLOTCONF4, mask, slot);
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case 64:
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conf1_val = BIT(AB8500_DIGIFCONF1_IF0BITCLKOS0);
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break;
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case 2:
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slot = ffs(tx_mask);
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snd_soc_component_update_bits(component, AB8500_DASLOTCONF1, mask, slot);
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snd_soc_component_update_bits(component, AB8500_DASLOTCONF3, mask, slot);
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slot = fls(tx_mask);
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snd_soc_component_update_bits(component, AB8500_DASLOTCONF2, mask, slot);
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snd_soc_component_update_bits(component, AB8500_DASLOTCONF4, mask, slot);
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case 128:
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conf1_val = BIT(AB8500_DIGIFCONF1_IF0BITCLKOS1);
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break;
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case 8:
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dev_dbg(dai->component->dev,
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"%s: In 8-channel mode DA-from-slot mapping is set manually.",
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__func__);
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case 256:
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conf1_val = BIT(AB8500_DIGIFCONF1_IF0BITCLKOS0) |
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BIT(AB8500_DIGIFCONF1_IF0BITCLKOS1);
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break;
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default:
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dev_err(dai->component->dev,
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"%s: Unsupported number of active TX-slots (%d)!\n",
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__func__, slots_active);
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dev_err(component->dev, "%s: Unsupported BCLK ratio (%u)!\n",
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__func__, clock_ratio);
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return -EINVAL;
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}
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/* Setup TDM AD according to active RX-slots */
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if (rx_mask & ~0xff)
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return -EINVAL;
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rx_mask = rx_mask << AB8500_AD_DATA0_OFFSET;
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slots_active = hweight32(rx_mask);
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dev_dbg(dai->component->dev, "%s: Slots, active, RX: %d\n", __func__,
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slots_active);
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switch (slots_active) {
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case 0:
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break;
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case 1:
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slot = ffs(rx_mask);
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snd_soc_component_update_bits(component, AB8500_ADSLOTSEL(slot),
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AB8500_MASK_SLOT(slot),
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AB8500_ADSLOTSELX_AD_OUT_TO_SLOT(AB8500_AD_OUT3, slot));
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break;
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case 2:
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slot = ffs(rx_mask);
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snd_soc_component_update_bits(component,
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AB8500_ADSLOTSEL(slot),
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AB8500_MASK_SLOT(slot),
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AB8500_ADSLOTSELX_AD_OUT_TO_SLOT(AB8500_AD_OUT3, slot));
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slot = fls(rx_mask);
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snd_soc_component_update_bits(component,
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AB8500_ADSLOTSEL(slot),
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AB8500_MASK_SLOT(slot),
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AB8500_ADSLOTSELX_AD_OUT_TO_SLOT(AB8500_AD_OUT2, slot));
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break;
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case 8:
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dev_dbg(dai->component->dev,
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"%s: In 8-channel mode AD-to-slot mapping is set manually.",
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active_mask = GENMASK(min(slots, 8) - 1, 0);
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if ((tx_mask | rx_mask) & ~active_mask) {
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dev_err(component->dev, "%s: Slot mask exceeds slot count\n",
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__func__);
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break;
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default:
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dev_err(dai->component->dev,
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"%s: Unsupported number of active RX-slots (%d)!\n",
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__func__, slots_active);
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return -EINVAL;
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}
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tx_active = hweight32(tx_mask);
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rx_active = hweight32(rx_mask);
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if (tx_active != 0 && tx_active != 1 && tx_active != 2 &&
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tx_active != 8) {
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dev_err(component->dev, "%s: Unsupported active TX slots (%u)!\n",
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__func__, tx_active);
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return -EINVAL;
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}
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if (rx_active != 0 && rx_active != 1 && rx_active != 2 &&
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rx_active != 8) {
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dev_err(component->dev, "%s: Unsupported active RX slots (%u)!\n",
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__func__, rx_active);
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return -EINVAL;
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}
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dev_dbg(component->dev,
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"%s: %d slots of %d bits, TX active: %u, RX active: %u\n",
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__func__, slots, slot_width, tx_active, rx_active);
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ret = snd_soc_component_update_bits(component, AB8500_DIGIFCONF2,
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mask, conf2_val);
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if (ret < 0)
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return ret;
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mask = BIT(AB8500_DIGIFCONF1_IF0BITCLKOS0) |
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BIT(AB8500_DIGIFCONF1_IF0BITCLKOS1);
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ret = snd_soc_component_update_bits(component, AB8500_DIGIFCONF1,
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mask, conf1_val);
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if (ret < 0)
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return ret;
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mask = AB8500_DASLOTCONFX_SLTODAX_MASK;
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if (tx_active == 1 || tx_active == 2) {
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slot = __ffs(tx_mask) + AB8500_DA_DATA0_OFFSET;
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reg = AB8500_DASLOTCONF1;
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ret = snd_soc_component_update_bits(component, reg, mask, slot);
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if (ret < 0)
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return ret;
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reg = AB8500_DASLOTCONF3;
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ret = snd_soc_component_update_bits(component, reg, mask, slot);
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if (ret < 0)
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return ret;
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if (tx_active == 2)
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slot = __fls(tx_mask) + AB8500_DA_DATA0_OFFSET;
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reg = AB8500_DASLOTCONF2;
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ret = snd_soc_component_update_bits(component, reg, mask, slot);
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if (ret < 0)
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return ret;
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reg = AB8500_DASLOTCONF4;
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ret = snd_soc_component_update_bits(component, reg, mask, slot);
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if (ret < 0)
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return ret;
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} else if (tx_active == 8) {
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channel = 0;
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for (slot = 0; slot < 8; slot++) {
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if (!(tx_mask & BIT(slot)))
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continue;
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reg = AB8500_DASLOTCONF1 + channel++;
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value = slot + AB8500_DA_DATA0_OFFSET;
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ret = snd_soc_component_update_bits(component, reg, mask, value);
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if (ret < 0)
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return ret;
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}
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}
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if (rx_active == 1 || rx_active == 2) {
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slot = __ffs(rx_mask) + AB8500_AD_DATA0_OFFSET;
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value = AB8500_ADSLOTSELX_AD_OUT_TO_SLOT(AB8500_AD_OUT3,
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slot);
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reg = AB8500_ADSLOTSEL(slot);
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mask = AB8500_MASK_SLOT(slot);
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ret = snd_soc_component_update_bits(component, reg, mask, value);
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if (ret < 0)
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return ret;
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if (rx_active == 2) {
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slot = __fls(rx_mask) + AB8500_AD_DATA0_OFFSET;
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value = AB8500_ADSLOTSELX_AD_OUT_TO_SLOT(AB8500_AD_OUT2,
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slot);
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reg = AB8500_ADSLOTSEL(slot);
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mask = AB8500_MASK_SLOT(slot);
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ret = snd_soc_component_update_bits(component, reg, mask, value);
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if (ret < 0)
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return ret;
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}
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} else if (rx_active == 8) {
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channel = 0;
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for (slot = 0; slot < 8; slot++) {
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if (!(rx_mask & BIT(slot)))
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continue;
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ad_out = AB8500_AD_OUT1 + channel++;
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value = AB8500_ADSLOTSELX_AD_OUT_TO_SLOT(ad_out, slot);
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reg = AB8500_ADSLOTSEL(slot);
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mask = AB8500_MASK_SLOT(slot);
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ret = snd_soc_component_update_bits(component, reg, mask, value);
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if (ret < 0)
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return ret;
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}
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}
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return 0;
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}
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