drm/i915/gmbus: s/gmbus_pins_skl/gmbus_pins_spt/

The GMBUS pin pair <-> GPIO mapping is purely a property
of the PCH (on the platforms where GMBUS lives in the PCH).
So rename gmbus_pins_skl[] to gmbus_pins_spt[] and apply
it based on the presence of the correct PCH type.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260623125111.6632-5-ville.syrjala@linux.intel.com
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
This commit is contained in:
Ville Syrjälä 2026-06-23 15:51:09 +03:00
parent 1c626c95b4
commit 85b4ba03d5

View File

@ -98,7 +98,7 @@ static const struct gmbus_pin gmbus_pins_lpt_lp[] = {
[GMBUS_PIN_DPB] = { "dpb", GPIO_4 },
};
static const struct gmbus_pin gmbus_pins_skl[] = {
static const struct gmbus_pin gmbus_pins_spt[] = {
[GMBUS_PIN_DPC] = { "dpc", GPIO_3 },
[GMBUS_PIN_DPB] = { "dpb", GPIO_4 },
[GMBUS_PIN_DPD] = { "dpd", GPIO_5 },
@ -180,9 +180,9 @@ static const struct gmbus_pin *get_gmbus_pin(struct intel_display *display,
} else if (display->platform.geminilake || display->platform.broxton) {
pins = gmbus_pins_bxt;
size = ARRAY_SIZE(gmbus_pins_bxt);
} else if (DISPLAY_VER(display) == 9) {
pins = gmbus_pins_skl;
size = ARRAY_SIZE(gmbus_pins_skl);
} else if (HAS_PCH_SPT(display)) {
pins = gmbus_pins_spt;
size = ARRAY_SIZE(gmbus_pins_spt);
} else if (HAS_PCH_LPT_LP(display)) {
pins = gmbus_pins_lpt_lp;
size = ARRAY_SIZE(gmbus_pins_lpt_lp);