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Amlogic ARM64 DT changes for v6.12:

Browse Source 
- New Boards:
   - AW419 (Amlogic C3)
 - Power Controller node for Amlogic A5 SoC
 - Always-On Secure node for Amlogig A4/T7/C4 & S4 SoCs
 - Amlogic A4 & C3 hardware support:
   - PLL, SPICC, NOND, SDCard, Ethernet, Watchdog
 - Final fixes for DTBs check:
   - add clock and clock-names to sound cards
   - drop saradc gxlx compatible
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Merge tag 'amlogic-arm64-dt-for-v6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt

Amlogic ARM64 DT changes for v6.12:
- New Boards:
  - AW419 (Amlogic C3)
- Power Controller node for Amlogic A5 SoC
- Always-On Secure node for Amlogig A4/T7/C4 & S4 SoCs
- Amlogic A4 & C3 hardware support:
  - PLL, SPICC, NOND, SDCard, Ethernet, Watchdog
- Final fixes for DTBs check:
  - add clock and clock-names to sound cards
  - drop saradc gxlx compatible

* tag 'amlogic-arm64-dt-for-v6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: amlogic: gxlx-s905l-p271: drop saradc gxlx compatible
  arm64: dts: amlogic: add clock and clock-names to sound cards
  arm64: dts: amlogic: c3: fix dtbcheck warning
  arm64: dts: amlogic: add C3 AW419 board
  arm64: dts: amlogic: add some device nodes for C3
  dt-bindings: clock: fix C3 PLL input parameter
  arm64: dts: amlogic: a4: add ao secure node
  arm64: dts: amlogic: t7: add ao secure node
  arm64: dts: amlogic: c3: add ao secure node
  arm64: dts: amlogic: s4: add ao secure node
  arm64: dts: amlogic: add watchdog node for A4 SoCs
  arm64: dts: amlogic: enable some device nodes for S4
  arm64: dts: amlogic: a5: add power domain controller node

Link: https://lore.kernel.org/r/cc8fb460-5ac0-4b16-8490-8ac9f89f1b7f@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2024-09-05 14:23:25 +00:00
commit 828b70ea7f
61 changed files with 1511 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
View File

@ -24,11 +24,13 @@ properties:
items:
- description: input top pll
- description: input mclk pll
- description: input fix pll
clock-names:
items:
- const: top
- const: mclk
- const: fix
"#clock-cells":
const: 1
@ -52,8 +54,9 @@ examples:
compatible = "amlogic,c3-pll-clkc";
reg = <0x0 0x8000 0x0 0x1a4>;
clocks = <&scmi_clk 2>,
<&scmi_clk 5>;
clock-names = "top", "mclk";
<&scmi_clk 5>,
<&scmi_clk 12>;
clock-names = "top", "mclk", "fix";
#clock-cells = <1>;
};
};

1
arch/arm64/boot/dts/amlogic/Makefile
View File

@ -2,6 +2,7 @@
dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb

14
arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi
View File

@ -52,6 +52,12 @@ apb: bus@fe000000 {
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
watchdog@2100 {
compatible = "amlogic,a4-wdt", "amlogic,t7-wdt";
reg = <0x0 0x2100 0x0 0x10>;
clocks = <&xtal>;
};
uart_b: serial@7a000 {
compatible = "amlogic,a4-uart",
"amlogic,meson-s4-uart";
@ -61,6 +67,14 @@ uart_b: serial@7a000 {
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
sec_ao: ao-secure@10220 {
compatible = "amlogic,a4-ao-secure",
"amlogic,meson-gx-ao-secure",
"syscon";
reg = <0x0 0x10220 0x0 0x140>;
amlogic,has-chip-id;
};
};
};
};

10
arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
View File

@ -4,6 +4,7 @@
*/
#include "amlogic-a4-common.dtsi"
#include <dt-bindings/power/amlogic,a5-pwrc.h>
/ {
cpus {
#address-cells = <2>;
@ -37,4 +38,13 @@ cpu3: cpu@300 {
enable-method = "psci";
};
};
sm: secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
pwrc: power-controller {
compatible = "amlogic,a5-pwrc";
#power-domain-cells = <1>;
};
};
};

231
arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
View File

@ -16,14 +16,245 @@ / {
aliases {
serial0 = &uart_b;
spi0 = &spifc;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x10000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 9 MiB reserved for ARM Trusted Firmware */
secmon_reserved: secmon@7f00000 {
compatible = "shared-dma-pool";
reg = <0x0 0x07f00000 0x0 0x900000>;
no-map;
};
};
main_12v: regulator-main-12v {
compatible = "regulator-fixed";
regulator-name = "12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-boot-on;
regulator-always-on;
};
vcc_5v: regulator-vcc-5v {
compatible = "regulator-fixed";
regulator-name = "VCC5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&main_12v>;
regulator-boot-on;
regulator-always-on;
};
vddq: regulator-vddq {
compatible = "regulator-fixed";
regulator-name = "VDDQ";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&main_12v>;
regulator-boot-on;
regulator-always-on;
};
vddao_3v3: regulator-vddao-3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&main_12v>;
regulator-boot-on;
regulator-always-on;
};
vddao_1v8: regulator-vddao-1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDAO1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-boot-on;
regulator-always-on;
};
ddr4_2v5: regulator-ddr4-2v5 {
compatible = "regulator-fixed";
regulator-name = "DDR4_2V5";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
vin-supply = <&vddao_3v3>;
regulator-boot-on;
regulator-always-on;
};
vcc_3v3: regulator-vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
regulator-boot-on;
regulator-always-on;
};
vcc_1v8: regulator-vcc-1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-boot-on;
regulator-always-on;
};
vdd_1v8: regulator-vdd-1v8 {
compatible = "regulator-fixed";
regulator-name = "VDD1V8_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-boot-on;
regulator-always-on;
};
vddio_b: regulator-vddio-3v3-b {
compatible = "regulator-fixed";
regulator-name = "VDDIO_B";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3>;
regulator-boot-on;
regulator-always-on;
};
sdcard: regulator-sdcard {
compatible = "regulator-fixed";
regulator-name = "SDCARD_POWER";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
regulator-boot-on;
regulator-always-on;
};
};
&uart_b {
status = "okay";
};
&nand {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-on-flash-bbt;
partition@0 {
label = "boot";
reg = <0x0 0x00200000>;
};
partition@200000 {
label = "env";
reg = <0x00200000 0x00400000>;
};
partition@600000 {
label = "system";
reg = <0x00600000 0x00a00000>;
};
partition@1000000 {
label = "rootfs";
reg = <0x01000000 0x03000000>;
};
partition@4000000 {
label = "media";
reg = <0x04000000 0x8000000>;
};
};
};
&ethmac {
status = "okay";
phy-handle = <&internal_ephy>;
phy-mode = "rmii";
};
&spifc {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&spifc_pins>;
pinctrl-names = "default";
nand@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <83000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
status = "disabled";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot";
reg = <0 0x200000>;
};
partition@200000 {
label = "env";
reg = <0x200000 0x400000>;
};
partition@600000 {
label = "system";
reg = <0x600000 0xa00000>;
};
partition@1000000 {
label = "rootfs";
reg = <0x1000000 0x3000000>;
};
partition@4000000 {
label = "data";
reg = <0x4000000 0x8000000>;
};
};
};
};
&sd {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default","clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&sdcard>;
vqmmc-supply = <&sdcard>;
};

260
arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts Normal file
View File

@ -0,0 +1,260 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
*/
/dts-v1/;
#include "amlogic-c3.dtsi"
/ {
model = "Amlogic C308l aw419 Development Board";
compatible = "amlogic,aw419", "amlogic,c3";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &uart_b;
spi0 = &spifc;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 9 MiB reserved for ARM Trusted Firmware */
secmon_reserved: secmon@7f00000 {
compatible = "shared-dma-pool";
reg = <0x0 0x07f00000 0x0 0x900000>;
no-map;
};
};
main_12v: regulator-main-12v {
compatible = "regulator-fixed";
regulator-name = "12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-boot-on;
regulator-always-on;
};
vcc_5v: regulator-vcc-5v {
compatible = "regulator-fixed";
regulator-name = "VCC5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&main_12v>;
regulator-boot-on;
regulator-always-on;
};
vddq: regulator-vddq {
compatible = "regulator-fixed";
regulator-name = "VDDQ";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&main_12v>;
regulator-boot-on;
regulator-always-on;
};
vddao_3v3: regulator-vddao-3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&main_12v>;
regulator-boot-on;
regulator-always-on;
};
vddao_1v8: regulator-vddao-1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDAO1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-boot-on;
regulator-always-on;
};
ddr4_2v5: regulator-ddr4-2v5 {
compatible = "regulator-fixed";
regulator-name = "DDR4_2V5";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
vin-supply = <&vddao_3v3>;
regulator-boot-on;
regulator-always-on;
};
vcc_3v3: regulator-vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
regulator-boot-on;
regulator-always-on;
};
vcc_1v8: regulator-vcc-1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-boot-on;
regulator-always-on;
};
vdd_1v8: regulator-vdd-1v8 {
compatible = "regulator-fixed";
regulator-name = "VDD1V8_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-boot-on;
regulator-always-on;
};
vddio_b: regulator-vddio-3v3-b {
compatible = "regulator-fixed";
regulator-name = "VDDIO_B";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3>;
regulator-boot-on;
regulator-always-on;
};
sdcard: regulator-sdcard {
compatible = "regulator-fixed";
regulator-name = "SDCARD_POWER";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
regulator-boot-on;
regulator-always-on;
};
};
&uart_b {
status = "okay";
};
&nand {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-on-flash-bbt;
partition@0 {
label = "boot";
reg = <0x0 0x00200000>;
};
partition@200000 {
label = "env";
reg = <0x00200000 0x00400000>;
};
partition@600000 {
label = "system";
reg = <0x00600000 0x00a00000>;
};
partition@1000000 {
label = "rootfs";
reg = <0x01000000 0x03000000>;
};
partition@4000000 {
label = "media";
reg = <0x04000000 0x8000000>;
};
};
};
&ethmac {
status = "okay";
phy-handle = <&internal_ephy>;
phy-mode = "rmii";
};
&spifc {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&spifc_pins>;
pinctrl-names = "default";
nand@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <83000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
status = "disabled";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot";
reg = <0 0x200000>;
};
partition@200000 {
label = "env";
reg = <0x200000 0x400000>;
};
partition@600000 {
label = "system";
reg = <0x600000 0xa00000>;
};
partition@1000000 {
label = "rootfs";
reg = <0x1000000 0x3000000>;
};
partition@4000000 {
label = "data";
reg = <0x4000000 0x8000000>;
};
};
};
};
&sd {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default","clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&sdcard>;
vqmmc-supply = <&sdcard>;
};

503
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
View File

@ -7,6 +7,11 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/reset/amlogic,c3-reset.h>
#include <dt-bindings/clock/amlogic,c3-pll-clkc.h>
#include <dt-bindings/clock/amlogic,c3-scmi-clkc.h>
#include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h>
#include <dt-bindings/power/amlogic,c3-pwrc.h>
#include <dt-bindings/gpio/amlogic-c3-gpio.h>
/ {
cpus {
@ -57,6 +62,34 @@ pwrc: power-controller {
};
};
sram@7f50e00 {
compatible = "mmio-sram";
reg = <0x0 0x07f50e00 0x0 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0x07f50e00 0x100>;
scmi_shmem: sram@0 {
compatible = "arm,scmi-shmem";
reg = <0x0 0x100>;
};
};
firmware {
scmi: scmi {
compatible = "arm,scmi-smc";
arm,smc-id = <0x820000C1>;
shmem = <&scmi_shmem>;
#address-cells = <1>;
#size-cells = <0>;
scmi_clk: protocol@14 {
reg = <0x14>;
#clock-cells = <1>;
};
};
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
@ -82,6 +115,44 @@ apb4: bus@fe000000 {
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
clkc_periphs: clock-controller@0 {
compatible = "amlogic,c3-peripherals-clkc";
reg = <0x0 0x0 0x0 0x49c>;
#clock-cells = <1>;
clocks = <&xtal>,
<&scmi_clk CLKID_OSC>,
<&scmi_clk CLKID_FIXED_PLL_OSC>,
<&clkc_pll CLKID_FCLK_DIV2>,
<&clkc_pll CLKID_FCLK_DIV2P5>,
<&clkc_pll CLKID_FCLK_DIV3>,
<&clkc_pll CLKID_FCLK_DIV4>,
<&clkc_pll CLKID_FCLK_DIV5>,
<&clkc_pll CLKID_FCLK_DIV7>,
<&clkc_pll CLKID_GP0_PLL>,
<&scmi_clk CLKID_GP1_PLL_OSC>,
<&clkc_pll CLKID_HIFI_PLL>,
<&scmi_clk CLKID_SYS_CLK>,
<&scmi_clk CLKID_AXI_CLK>,
<&scmi_clk CLKID_SYS_PLL_DIV16>,
<&scmi_clk CLKID_CPU_CLK_DIV16>;
clock-names = "xtal_24m",
"oscin",
"fix",
"fdiv2",
"fdiv2p5",
"fdiv3",
"fdiv4",
"fdiv5",
"fdiv7",
"gp0",
"gp1",
"hifi",
"sysclk",
"axiclk",
"sysplldiv16",
"cpudiv16";
};
reset: reset-controller@2000 {
compatible = "amlogic,c3-reset";
reg = <0x0 0x2000 0x0 0x98>;
@ -98,16 +169,247 @@ periphs_pinctrl: pinctrl@4000 {
compatible = "amlogic,c3-periphs-pinctrl";
#address-cells = <2>;
#size-cells = <2>;
ranges;
ranges = <0x0 0x0 0x0 0x4000 0x0 0x02de>;
gpio: bank@4000 {
reg = <0x0 0x4000 0x0 0x004c>,
<0x0 0x4100 0x0 0x01de>;
gpio: bank@0 {
reg = <0x0 0x0 0x0 0x004c>,
<0x0 0x100 0x0 0x01de>;
reg-names = "mux", "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 0 55>;
};
i2c0_pins1: i2c0-pins1 {
mux {
groups = "i2c0_sda_e",
"i2c0_scl_e";
function = "i2c0";
bias-disable;
drive-strength-microamp = <3000>;
};
};
i2c0_pins2: i2c0-pins2 {
mux {
groups = "i2c0_sda_d",
"i2c0_scl_d";
function = "i2c0";
bias-disable;
drive-strength-microamp = <3000>;
};
};
i2c1_pins1: i2c1-pins1 {
mux {
groups = "i2c1_sda_x",
"i2c1_scl_x";
function = "i2c1";
bias-disable;
drive-strength-microamp = <3000>;
};
};
i2c1_pins2: i2c1-pins2 {
mux {
groups = "i2c1_sda_d",
"i2c1_scl_d";
function = "i2c1";
bias-disable;
drive-strength-microamp = <3000>;
};
};
i2c1_pins3: i2c1-pins3 {
mux {
groups = "i2c1_sda_a",
"i2c1_scl_a";
function = "i2c1";
bias-disable;
drive-strength-microamp = <3000>;
};
};
i2c1_pins4: i2c1-pins4 {
mux {
groups = "i2c1_sda_b",
"i2c1_scl_b";
function = "i2c1";
bias-disable;
drive-strength-microamp = <3000>;
};
};
i2c2_pins1: i2c2-pins1 {
mux {
groups = "i2c2_sda",
"i2c2_scl";
function = "i2c2";
bias-disable;
drive-strength-microamp = <3000>;
};
};
i2c3_pins1: i2c3-pins1 {
mux {
groups = "i2c3_sda_c",
"i2c3_scl_c";
function = "i2c3";
bias-disable;
drive-strength-microamp = <3000>;
};
};
i2c3_pins2: i2c3-pins2 {
mux {
groups = "i2c3_sda_x",
"i2c3_scl_x";
function = "i2c3";
bias-disable;
drive-strength-microamp = <3000>;
};
};
i2c3_pins3: i2c3-pins3 {
mux {
groups = "i2c3_sda_d",
"i2c3_scl_d";
function = "i2c3";
bias-disable;
drive-strength-microamp = <3000>;
};
};
nand_pins: nand-pins {
mux {
groups = "emmc_nand_d0",
"emmc_nand_d1",
"emmc_nand_d2",
"emmc_nand_d3",
"emmc_nand_d4",
"emmc_nand_d5",
"emmc_nand_d6",
"emmc_nand_d7",
"nand_ce0",
"nand_ale",
"nand_cle",
"nand_wen_clk",
"nand_ren_wr";
function = "nand";
input-enable;
};
};
sdcard_pins: sdcard-pins {
mux {
groups = "sdcard_d0",
"sdcard_d1",
"sdcard_d2",
"sdcard_d3",
"sdcard_clk",
"sdcard_cmd";
function = "sdcard";
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
sdcard_clk_gate_pins: sdcard-clk-cmd-pins {
mux {
groups = "GPIOC_4";
function = "gpio_periphs";
bias-pull-down;
drive-strength-microamp = <4000>;
};
};
sdio_m_clk_gate_pins: sdio-m-clk-cmd-pins {
mux {
groups = "sdio_clk";
function = "sdio";
bias-pull-down;
drive-strength-microamp = <4000>;
};
};
sdio_m_pins: sdio-m-all-pins {
mux {
groups = "sdio_d0",
"sdio_d1",
"sdio_d2",
"sdio_d3",
"sdio_clk",
"sdio_cmd";
function = "sdio";
input-enable;
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
spicc0_pins1: spicc0-pins1 {
mux {
groups = "spi_a_mosi_b",
"spi_a_miso_b",
"spi_a_clk_b";
function = "spi_a";
drive-strength-microamp = <3000>;
};
};
spicc0_pins2: spicc0-pins2 {
mux {
groups = "spi_a_mosi_c",
"spi_a_miso_c",
"spi_a_clk_c";
function = "spi_a";
drive-strength-microamp = <3000>;
};
};
spicc0_pins3: spicc0-pins3 {
mux {
groups = "spi_a_mosi_x",
"spi_a_miso_x",
"spi_a_clk_x";
function = "spi_a";
drive-strength-microamp = <3000>;
};
};
spicc1_pins1: spicc1-pins1 {
mux {
groups = "spi_b_mosi_d",
"spi_b_miso_d",
"spi_b_clk_d";
function = "spi_b";
drive-strength-microamp = <3000>;
};
};
spicc1_pins2: spicc1-pins2 {
mux {
groups = "spi_b_mosi_x",
"spi_b_miso_x",
"spi_b_clk_x";
function = "spi_b";
drive-strength-microamp = <3000>;
};
};
spifc_pins: spifc-pins {
mux {
groups = "spif_mo",
"spif_mi",
"spif_clk",
"spif_cs",
"spif_hold",
"spif_wp",
"spif_clk_loop";
function = "spif";
drive-strength-microamp = <4000>;
};
};
};
gpio_intc: interrupt-controller@4080 {
@ -119,16 +421,207 @@ gpio_intc: interrupt-controller@4080 {
<10 11 12 13 14 15 16 17 18 19 20 21>;
};
clkc_pll: clock-controller@8000 {
compatible = "amlogic,c3-pll-clkc";
reg = <0x0 0x8000 0x0 0x1a4>;
#clock-cells = <1>;
clocks = <&scmi_clk CLKID_TOP_PLL_OSC>,
<&scmi_clk CLKID_MCLK_PLL_OSC>,
<&scmi_clk CLKID_FIXED_PLL_OSC>;
clock-names = "top",
"mclk",
"fix";
};
eth_phy: mdio-multiplexer@28000 {
compatible = "amlogic,g12a-mdio-mux";
reg = <0x0 0x28000 0x0 0xa4>;
clocks = <&clkc_periphs CLKID_SYS_ETH_PHY>,
<&xtal>,
<&clkc_pll CLKID_FCLK_50M>;
clock-names = "pclk", "clkin0", "clkin1";
mdio-parent-bus = <&mdio0>;
#address-cells = <1>;
#size-cells = <0>;
ext_mdio: mdio@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
int_mdio: mdio@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
internal_ephy: ethernet_phy@8 {
compatible = "ethernet-phy-id0180.3301",
"ethernet-phy-ieee802.3-c22";
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
reg = <8>;
max-speed = <100>;
};
};
};
spicc0: spi@50000 {
compatible = "amlogic,meson-g12a-spicc";
reg = <0x0 0x50000 0x0 0x44>;
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc_periphs CLKID_SYS_SPICC_0>,
<&clkc_periphs CLKID_SPICC_A>;
clock-names = "core", "pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spicc1: spi@52000 {
compatible = "amlogic,meson-g12a-spicc";
reg = <0x0 0x52000 0x0 0x44>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc_periphs CLKID_SYS_SPICC_1>,
<&clkc_periphs CLKID_SPICC_B>;
clock-names = "core", "pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spifc: spi@56000 {
compatible = "amlogic,a1-spifc";
reg = <0x0 0x56000 0x0 0x290>;
interrupts = <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_periphs CLKID_SPIFC>;
clock-names = "core";
status = "disabled";
};
i2c0: i2c@66000 {
compatible = "amlogic,meson-axg-i2c";
reg = <0x0 0x66000 0x0 0x24>;
interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc_periphs CLKID_SYS_I2C_M_A>;
status = "disabled";
};
i2c1: i2c@68000 {
compatible = "amlogic,meson-axg-i2c";
reg = <0x0 0x68000 0x0 0x24>;
interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc_periphs CLKID_SYS_I2C_M_B>;
status = "disabled";
};
i2c2: i2c@6a000 {
compatible = "amlogic,meson-axg-i2c";
reg = <0x0 0x6a000 0x0 0x24>;
interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc_periphs CLKID_SYS_I2C_M_C>;
status = "disabled";
};
i2c3: i2c@6c000 {
compatible = "amlogic,meson-axg-i2c";
reg = <0x0 0x6c000 0x0 0x24>;
interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc_periphs CLKID_SYS_I2C_M_D>;
status = "disabled";
};
uart_b: serial@7a000 {
compatible = "amlogic,meson-s4-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x7a000 0x0 0x18>;
interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
clocks = <&xtal>, <&xtal>, <&xtal>;
clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_B>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
sec_ao: ao-secure@10220 {
compatible = "amlogic,c3-ao-secure",
"amlogic,meson-gx-ao-secure",
"syscon";
reg = <0x0 0x10220 0x0 0x140>;
amlogic,has-chip-id;
};
sdio: mmc@88000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0x88000 0x0 0x800>;
interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>;
power-domains = <&pwrc PWRC_C3_SDIOA_ID>;
clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>,
<&clkc_periphs CLKID_SD_EMMC_A>,
<&clkc_pll CLKID_FCLK_DIV2>;
clock-names = "core","clkin0", "clkin1";
no-mmc;
no-sd;
resets = <&reset RESET_SD_EMMC_A>;
status = "disabled";
};
sd: mmc@8a000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0x8a000 0x0 0x800>;
interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
<&clkc_periphs CLKID_SD_EMMC_B>,
<&clkc_pll CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
no-mmc;
no-sdio;
resets = <&reset RESET_SD_EMMC_B>;
status = "disabled";
};
nand: nand-controller@8d000 {
compatible = "amlogic,meson-axg-nfc";
reg = <0x0 0x8d000 0x0 0x200>,
<0x0 0x8C000 0x0 0x4>;
reg-names = "nfc", "emmc";
interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>,
<&clkc_pll CLKID_FCLK_DIV2>;
clock-names = "core", "device";
status = "disabled";
};
};
ethmac: ethernet@fdc00000 {
compatible = "amlogic,meson-g12a-dwmac",
"snps,dwmac-3.70a",
"snps,dwmac";
reg = <0x0 0xfdc00000 0x0 0x10000>,
<0x0 0xfe024000 0x0 0x8>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
power-domains = <&pwrc PWRC_C3_ETH_ID>;
clocks = <&clkc_periphs CLKID_SYS_ETH_MAC>,
<&clkc_pll CLKID_FCLK_DIV2>,
<&clkc_pll CLKID_FCLK_50M>;
clock-names = "stmmaceth", "clkin0", "clkin1";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
status = "disabled";
mdio0: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
};
};
};

8
arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
View File

@ -194,6 +194,14 @@ uart_a: serial@78000 {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
sec_ao: ao-secure@10220 {
compatible = "amlogic,t7-ao-secure",
"amlogic,meson-gx-ao-secure",
"syscon";
reg = <0x0 0x10220 0x0 0x140>;
amlogic,has-chip-id;
};
};
};

4
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
View File

@ -268,6 +268,10 @@ sound {
"Speaker1 Right", "SPK1 OUT_D",
"Linein AINL", "Linein",
"Linein AINR", "Linein";
clocks = <&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
View File

@ -176,6 +176,10 @@ sound {
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
View File

@ -138,6 +138,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
View File

@ -201,6 +201,10 @@ sound {
"TODDR_B IN 1", "TDMIN_B OUT",
"TODDR_C IN 1", "TDMIN_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
View File

@ -238,6 +238,10 @@ sound {
"Lineout", "10U2 OUTL",
"Lineout", "10U2 OUTR";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
View File

@ -158,6 +158,10 @@ sound {
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
View File

@ -70,6 +70,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts
View File

@ -79,6 +79,10 @@ sound {
"LINPUT1", "Mic Jack",
"Mic Jack", "MICB";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
View File

@ -194,6 +194,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

6
arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
View File

@ -38,6 +38,12 @@ sound {
"SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts
View File

@ -48,6 +48,10 @@ sound {
"TDMOUT_A IN 2", "FRDDR_C OUT 1",
"TDM_A Playback", "TDMOUT_A OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
View File

@ -49,6 +49,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
View File

@ -37,6 +37,10 @@ sound {
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
View File

@ -234,6 +234,10 @@ sound {
"Internal Speakers", "Speaker Amplifier OUTL",
"Internal Speakers", "Speaker Amplifier OUTR";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
View File

@ -95,6 +95,10 @@ sound {
"Lineout", "U19 OUTL",
"Lineout", "U19 OUTR";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts
View File

@ -39,6 +39,10 @@ sound {
"TODDR_B IN 6", "TDMIN_LB OUT",
"TODDR_C IN 6", "TDMIN_LB OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
View File

@ -176,6 +176,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
View File

@ -32,6 +32,10 @@ sound {
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
View File

@ -194,6 +194,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"7J4-14 LEFT", "AU2 OUTL",
"7J4-11 RIGHT", "AU2 OUTR";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
View File

@ -129,6 +129,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts
View File

@ -45,6 +45,10 @@ button-reset {
sound {
compatible = "amlogic,gx-sound-card";
model = "KII-PRO";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
View File

@ -135,6 +135,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "NANOPI-K2";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
View File

@ -142,6 +142,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "NEXBOX-A95X";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
View File

@ -177,6 +177,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "ODROID-C2";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
View File

@ -68,6 +68,10 @@ button-menu {
sound {
compatible = "amlogic,gx-sound-card";
model = "P200";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
View File

@ -17,6 +17,10 @@ / {
sound {
compatible = "amlogic,gx-sound-card";
model = "P201";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
View File

@ -108,6 +108,10 @@ sdio_pwrseq: sdio-pwrseq {
sound {
compatible = "amlogic,gx-sound-card";
model = "VEGA-S95";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
View File

@ -16,6 +16,10 @@ / {
sound {
compatible = "amlogic,gx-sound-card";
model = "WETEK-HUB";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
View File

@ -48,6 +48,10 @@ button {
sound {
compatible = "amlogic,gx-sound-card";
model = "WETEK-PLAY2";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
View File

@ -123,6 +123,10 @@ sound {
"Speaker", "9J5-2 RIGHT";
audio-routing = "9J5-3 LEFT", "ACODEC LOLN",
"9J5-2 RIGHT", "ACODEC LORN";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
View File

@ -128,6 +128,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
View File

@ -67,6 +67,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "KHADAS-VIM";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts
View File

@ -160,6 +160,10 @@ vcc_1v8: regulator-vcc-1v8 {
sound {
compatible = "amlogic,gx-sound-card";
model = "LIBRETECH-CC-V2";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
View File

@ -142,6 +142,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
View File

@ -50,6 +50,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

5
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
View File

@ -90,6 +90,11 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts
View File

@ -38,10 +38,6 @@ mali: gpu@c0000 {
};
};
&saradc {
compatible = "amlogic,meson-gxlx-saradc", "amlogic,meson-saradc";
};
&usb {
dr_mode = "host";
};

4
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
View File

@ -150,6 +150,10 @@ wifi32k: wifi32k {
sound {
compatible = "amlogic,gx-sound-card";
model = "KHADAS-VIM2";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
View File

@ -86,6 +86,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "NEXBOX-A1";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
View File

@ -101,6 +101,10 @@ sdio_pwrseq: sdio-pwrseq {
sound {
compatible = "amlogic,gx-sound-card";
model = "RBOX-PRO";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;

4
arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
View File

@ -182,6 +182,10 @@ sound {
"TODDR_B IN 0", "TDMIN_A OUT",
"TODDR_C IN 0", "TDMIN_A OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
View File

@ -200,6 +200,10 @@ sound {
<&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
<&dioo2133>;
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

145
arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
View File

@ -34,6 +34,111 @@ secmon_reserved: secmon@5000000 {
no-map;
};
};
sdio_32k: sdio-32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&sdio_32k>;
clock-names = "ext_clock";
};
main_12v: regulator-main-12v {
compatible = "regulator-fixed";
regulator-name = "12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
};
vddao_3v3: regulator-vddao-3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&main_12v>;
regulator-always-on;
};
vddio_ao1v8: regulator-vddio-ao1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
/* SY8120B1ABC DC/DC Regulator. */
vddcpu: regulator-vddcpu {
compatible = "pwm-regulator";
regulator-name = "VDDCPU";
regulator-min-microvolt = <689000>;
regulator-max-microvolt = <1049000>;
vin-supply = <&main_12v>;
pwms = <&pwm_ij 1 1500 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
/* Voltage Duty-Cycle */
voltage-table = <1049000 0>,
<1039000 3>,
<1029000 6>,
<1019000 9>,
<1009000 12>,
<999000 14>,
<989000 17>,
<979000 20>,
<969000 23>,
<959000 26>,
<949000 29>,
<939000 31>,
<929000 34>,
<919000 37>,
<909000 40>,
<899000 43>,
<889000 45>,
<879000 48>,
<869000 51>,
<859000 54>,
<849000 56>,
<839000 59>,
<829000 62>,
<819000 65>,
<809000 68>,
<799000 70>,
<789000 73>,
<779000 76>,
<769000 79>,
<759000 81>,
<749000 84>,
<739000 87>,
<729000 89>,
<719000 92>,
<709000 95>,
<699000 98>,
<689000 100>;
};
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins1>;
pinctrl-names = "default";
};
&pwm_ij {
status = "okay";
};
&uart_b {
@ -46,6 +151,40 @@ &ir {
pinctrl-names = "default";
};
&sdio {
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr50;
sd-uhs-sdr104;
max-frequency = <200000000>;
non-removable;
disable-wp;
no-sd;
no-mmc;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_ao1v8>;
};
&sd {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <200000000>;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddao_3v3>;
};
&nand {
status = "okay";
#address-cells = <1>;
@ -90,3 +229,9 @@ &spicc0 {
pinctrl-0 = <&spicc0_pins_x>;
cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>;
};
&ethmac {
status = "okay";
phy-handle = <&internal_ephy>;
phy-mode = "rmii";
};

136
arch/arm64/boot/dts/amlogic/meson-s4.dtsi
View File

@ -10,6 +10,7 @@
#include <dt-bindings/clock/amlogic,s4-pll-clkc.h>
#include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
#include <dt-bindings/power/meson-s4-power.h>
#include <dt-bindings/reset/amlogic,meson-s4-reset.h>
/ {
cpus {
@ -466,6 +467,93 @@ mux {
};
};
sdcard_pins: sdcard-pins {
mux {
groups = "sdcard_d0_c",
"sdcard_d1_c",
"sdcard_d2_c",
"sdcard_d3_c",
"sdcard_clk_c",
"sdcard_cmd_c";
function = "sdcard";
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
sdcard_clk_gate_pins: sdcard-clk-gate-pins {
mux {
groups = "GPIOC_4";
function = "gpio_periphs";
bias-pull-down;
drive-strength-microamp = <4000>;
};
};
emmc_pins: emmc-pins {
mux-0 {
groups = "emmc_nand_d0",
"emmc_nand_d1",
"emmc_nand_d2",
"emmc_nand_d3",
"emmc_nand_d4",
"emmc_nand_d5",
"emmc_nand_d6",
"emmc_nand_d7",
"emmc_cmd";
function = "emmc";
bias-pull-up;
drive-strength-microamp = <4000>;
};
mux-1 {
groups = "emmc_clk";
function = "emmc";
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
emmc_ds_pins: emmc-ds-pins {
mux {
groups = "emmc_nand_ds";
function = "emmc";
bias-pull-down;
drive-strength-microamp = <4000>;
};
};
emmc_clk_gate_pins: emmc-clk-gate-pins {
mux {
groups = "GPIOB_8";
function = "gpio_periphs";
bias-pull-down;
drive-strength-microamp = <4000>;
};
};
sdio_pins: sdio-pins {
mux {
groups = "sdio_d0",
"sdio_d1",
"sdio_d2",
"sdio_d3",
"sdio_clk",
"sdio_cmd";
function = "sdio";
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
sdio_clk_gate_pins: sdio-clk-gate-pins {
mux {
groups = "GPIOX_4";
function = "gpio_periphs";
bias-pull-down;
drive-strength-microamp = <4000>;
};
};
spicc0_pins_x: spicc0-pins_x {
mux {
groups = "spi_a_mosi_x",
@ -675,6 +763,14 @@ reset: reset-controller@2000 {
#reset-cells = <1>;
};
sec_ao: ao-secure@10220 {
compatible = "amlogic,s4-ao-secure",
"amlogic,meson-gx-ao-secure",
"syscon";
reg = <0x0 0x10220 0x0 0x140>;
amlogic,has-chip-id;
};
ir: ir@84040 {
compatible = "amlogic,meson-s4-ir";
reg = <0x0 0x84040 0x0 0x30>;
@ -712,5 +808,45 @@ mdio0: mdio {
compatible = "snps,dwmac-mdio";
};
};
sdio: mmc@fe088000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0xfe088000 0x0 0x800>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc_periphs CLKID_SDEMMC_A>,
<&xtal>,
<&clkc_pll CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_A>;
cap-sdio-irq;
keep-power-in-suspend;
status = "disabled";
};
sd: mmc@fe08a000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0xfe08a000 0x0 0x800>;
interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_periphs CLKID_SDEMMC_B>,
<&clkc_periphs CLKID_SD_EMMC_B>,
<&clkc_pll CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_B>;
status = "disabled";
};
emmc: mmc@fe08c000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0xfe08c000 0x0 0x800>;
interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_periphs CLKID_NAND>,
<&xtal>,
<&clkc_pll CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_NAND_EMMC>;
no-sdio;
no-sd;
status = "disabled";
};
};
};

4
arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts
View File

@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts
View File

@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts
View File

@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
View File

@ -57,6 +57,10 @@ sound {
"Lineout", "ACODEC LOLP",
"Lineout", "ACODEC LORP";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
View File

@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
View File

@ -174,6 +174,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
View File

@ -239,6 +239,10 @@ sound {
"TODDR_B IN 1", "TDMIN_B OUT",
"TODDR_C IN 1", "TDMIN_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts
View File

@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;

4
arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts
View File

@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;