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dt-bindings: arm: mediatek: mediatek,g3dsys: Convert to DT schema
Convert the MediaTek G3D system controller devicetree binding from the legacy text format to DT schema. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com> Link: https://patch.msgid.link/20260822093829.46295-1-challauday369@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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MediaTek g3dsys controller
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============================
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The MediaTek g3dsys controller provides various clocks and reset controller to
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the GPU.
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Required Properties:
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- compatible: Should be:
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- "mediatek,mt2701-g3dsys", "syscon":
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for MT2701 SoC
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- "mediatek,mt7623-g3dsys", "mediatek,mt2701-g3dsys", "syscon":
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for MT7623 SoC
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- #clock-cells: Must be 1
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- #reset-cells: Must be 1
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The g3dsys controller uses the common clk binding from
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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The available clocks are defined in dt-bindings/clock/mt*-clk.h.
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Example:
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g3dsys: clock-controller@13000000 {
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compatible = "mediatek,mt7623-g3dsys",
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"mediatek,mt2701-g3dsys",
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"syscon";
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reg = <0 0x13000000 0 0x200>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mt2701-g3dsys.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek G3D System Controller
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maintainers:
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- Sean Wang <sean.wang@mediatek.com>
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- Ryder Lee <ryder.lee@mediatek.com>
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description: |
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The MediaTek G3D system controller provides clocks and reset control
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for the GPU subsystem on MediaTek SoCs.
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properties:
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compatible:
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oneOf:
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- items:
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- const: mediatek,mt2701-g3dsys
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- const: syscon
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- items:
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- const: mediatek,mt7623-g3dsys
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- const: mediatek,mt2701-g3dsys
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- const: syscon
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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"#reset-cells":
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const: 1
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required:
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- compatible
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- reg
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- "#clock-cells"
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- "#reset-cells"
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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g3dsys: syscon@13000000 {
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compatible = "mediatek,mt7623-g3dsys",
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"mediatek,mt2701-g3dsys",
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"syscon";
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reg = <0 0x13000000 0 0x200>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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};
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