diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.txt deleted file mode 100644 index 7de43bf41fdc..000000000000 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.txt +++ /dev/null @@ -1,30 +0,0 @@ -MediaTek g3dsys controller -============================ - -The MediaTek g3dsys controller provides various clocks and reset controller to -the GPU. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt2701-g3dsys", "syscon": - for MT2701 SoC - - "mediatek,mt7623-g3dsys", "mediatek,mt2701-g3dsys", "syscon": - for MT7623 SoC -- #clock-cells: Must be 1 -- #reset-cells: Must be 1 - -The g3dsys controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -g3dsys: clock-controller@13000000 { - compatible = "mediatek,mt7623-g3dsys", - "mediatek,mt2701-g3dsys", - "syscon"; - reg = <0 0x13000000 0 0x200>; - #clock-cells = <1>; - #reset-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt2701-g3dsys.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt2701-g3dsys.yaml new file mode 100644 index 000000000000..ad3df062d5db --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt2701-g3dsys.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mt2701-g3dsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek G3D System Controller + +maintainers: + - Sean Wang + - Ryder Lee + +description: | + The MediaTek G3D system controller provides clocks and reset control + for the GPU subsystem on MediaTek SoCs. + +properties: + compatible: + oneOf: + - items: + - const: mediatek,mt2701-g3dsys + - const: syscon + - items: + - const: mediatek,mt7623-g3dsys + - const: mediatek,mt2701-g3dsys + - const: syscon + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + g3dsys: syscon@13000000 { + compatible = "mediatek,mt7623-g3dsys", + "mediatek,mt2701-g3dsys", + "syscon"; + reg = <0 0x13000000 0 0x200>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + };