arm64: dts: qcom: monaco: Add HS/SS endpoints for USB1 controller

Add a port node exposing the High‑Speed and Super‑Speed endpoints,
allowing the USB controller to be linked through the device‑tree
graph.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260313103824.2634519-2-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Loic Poulain 2026-03-13 10:38:16 +00:00 committed by Bjorn Andersson
parent 0b63fb8c3e
commit 7ceeb30c33

View File

@ -5191,6 +5191,25 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
wakeup-source;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_1_dwc3_hs: endpoint {
};
};
port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
};
};
};
};
usb_2: usb@a400000 {