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arm64: dts: qcom: monaco: Add HS/SS endpoints for USB1 controller
Add a port node exposing the High‑Speed and Super‑Speed endpoints, allowing the USB controller to be linked through the device‑tree graph. Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260313103824.2634519-2-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -5191,6 +5191,25 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
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wakeup-source;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usb_1_dwc3_hs: endpoint {
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};
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};
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port@1 {
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reg = <1>;
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usb_1_dwc3_ss: endpoint {
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};
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};
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};
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};
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usb_2: usb@a400000 {
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