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arm64: dts: rockchip: rk3568: modify sata0-sata2 registers address

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Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I4d704200ef596118a308e03542dae089a3d43dfa
This commit is contained in:
Yifeng Zhao 2020-11-12 14:37:34 +08:00 committed by Tao Huang
parent 46028feca7
commit 7be685fb2c
1 changed files with 3 additions and 3 deletions
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6
arch/arm64/boot/dts/rockchip/rk3568.dtsi
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@ -177,7 +177,7 @@ xin24m: xin24m {
sata0: sata@fc000000 {
compatible = "snps,dwc-ahci";
reg = <0 0xfc300000 0 0x1000>;
reg = <0 0xfc000000 0 0x1000>;
clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
<&cru CLK_SATA0_RXOOB>;
clock-names = "sata", "pmalive", "rxoob";
@ -192,7 +192,7 @@ sata0: sata@fc000000 {
sata1: sata@fc400000 {
compatible = "snps,dwc-ahci";
reg = <0 0xfc340000 0 0x1000>;
reg = <0 0xfc400000 0 0x1000>;
clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
<&cru CLK_SATA1_RXOOB>;
clock-names = "sata", "pmalive", "rxoob";
@ -207,7 +207,7 @@ sata1: sata@fc400000 {
sata2: sata@fc800000 {
compatible = "snps,dwc-ahci";
reg = <0 0xfc380000 0 0x1000>;
reg = <0 0xfc800000 0 0x1000>;
clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
<&cru CLK_SATA2_RXOOB>;
clock-names = "sata", "pmalive", "rxoob";