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MediaTek ARM64 DeviceTree updates

Browse Source 
This adds fixes and improvements for already supported devices.
 
 In particular:
  - The gpio-ranges pin could was fixed in MT6795, MT7981B, and
    MT7986A SoCs, as the very last GPIO was unusable; Even though
    anyway unused, this fixes the hardware description.
  - Model string fixes for Bananapi BPI-R4 Pro 4E/8X: now the
    correct model is shown.
  - The MT6359 PMIC gets disambiguation for two default regulator
    names, mainly fixing issues seen on U-Boot, but also making
    the regulators visually distinguishable in a summary...!
  - Aliases for eMMC/SD controllers added in MT8365 EVK board,
    MT8395 Radxa NIO-12L and Genio 1200 for consistency
  - Fixes to the MediaTek AUDSYS devicetree binding
 
 ....and honorable mention goes to:
  - MT8195 Cherry Chromebooks get their WiFi on PCI Express and
    Bluetooth on USB described with the proper power supplies now
    tied to the correct devices (USB VBUS and PCIE3v3): this is
    now described almost perfectly, or at least links the right
    resources in the right places.
    This is also done as a preparation for when the M.2 E-Key
    connector binding will be upstreamed.
  - MT8195 Cherry Dojo gets its M.2 M-Key slot correctly described
    with the new pcie-m2-m-connector binding.
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Merge tag 'mtk-dts64-for-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

MediaTek ARM64 DeviceTree updates

This adds fixes and improvements for already supported devices.

In particular:
 - The gpio-ranges pin could was fixed in MT6795, MT7981B, and
   MT7986A SoCs, as the very last GPIO was unusable; Even though
   anyway unused, this fixes the hardware description.
 - Model string fixes for Bananapi BPI-R4 Pro 4E/8X: now the
   correct model is shown.
 - The MT6359 PMIC gets disambiguation for two default regulator
   names, mainly fixing issues seen on U-Boot, but also making
   the regulators visually distinguishable in a summary...!
 - Aliases for eMMC/SD controllers added in MT8365 EVK board,
   MT8395 Radxa NIO-12L and Genio 1200 for consistency
 - Fixes to the MediaTek AUDSYS devicetree binding

....and honorable mention goes to:
 - MT8195 Cherry Chromebooks get their WiFi on PCI Express and
   Bluetooth on USB described with the proper power supplies now
   tied to the correct devices (USB VBUS and PCIE3v3): this is
   now described almost perfectly, or at least links the right
   resources in the right places.
   This is also done as a preparation for when the M.2 E-Key
   connector binding will be upstreamed.
 - MT8195 Cherry Dojo gets its M.2 M-Key slot correctly described
   with the new pcie-m2-m-connector binding.

* tag 'mtk-dts64-for-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
  arm64: dts: mediatek: mt7986a: Fix gpio-ranges pin count
  arm64: dts: mediatek: mt7981b: Fix gpio-ranges pin count
  arm64: dts: mediatek: mt6795: Fix gpio-ranges pin count
  dt-bindings: arm: mediatek: audsys: fix formatting issues
  arm64: dts: mediatek: mt8195-cherry-dojo: Describe M.2 M-key NVMe slot
  arm64: dts: mediatek: mt8195-cherry: add WiFi PCIe and BT USB power supplies
  arm64: dts: mediatek: mt7988a-bpi-r4pro: fix model string
  arm64: dts: mt8167: Reorder nodes according to mmio address
  arm64: dts: mediatek: mt6359: give regulators unique names
  arm64: dts: mediatek: mt8365: Describe infracfg-nao as a pure syscon
  arm64: dts: mediatek: mt8365-evk: add mmc aliases
  arm64: dts: mediatek: mt8395-radxa-nio-12l: add mmc aliases
  arm64: dts: mediatek: mt8395-genio-common: add mmc aliases
  arm64: dts: mediatek: mt8195-cherry: Disable xhci1 completely

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2026-03-27 12:45:33 +01:00
commit 789ca08f31
14 changed files with 157 additions and 99 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

59
Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml
View File

@ -49,38 +49,37 @@ required:
- '#clock-cells'
allOf:
- if:
properties:
compatible:
contains:
enum:
- mediatek,mt2701-audsys
- mediatek,mt7622-audsys
then:
properties:
audio-controller:
$ref: /schemas/sound/mediatek,mt2701-audio.yaml#
- if:
properties:
compatible:
contains:
enum:
- mediatek,mt2701-audsys
- mediatek,mt7622-audsys
then:
properties:
audio-controller:
$ref: /schemas/sound/mediatek,mt2701-audio.yaml#
- if:
properties:
compatible:
contains:
const: mediatek,mt8183-audiosys
then:
properties:
audio-controller:
$ref: /schemas/sound/mediatek,mt8183-audio.yaml#
- if:
properties:
compatible:
contains:
const: mediatek,mt8192-audsys
then:
properties:
audio-controller:
$ref: /schemas/sound/mt8192-afe-pcm.yaml#
- if:
properties:
compatible:
contains:
const: mediatek,mt8183-audiosys
then:
properties:
audio-controller:
$ref: /schemas/sound/mediatek,mt8183-audio.yaml#
- if:
properties:
compatible:
contains:
const: mediatek,mt8192-audsys
then:
properties:
audio-controller:
$ref: /schemas/sound/mt8192-afe-pcm.yaml#
additionalProperties: false

4
arch/arm64/boot/dts/mediatek/mt6359.dtsi
View File

@ -205,7 +205,7 @@ mt6359_vrfck_ldo_reg: ldo_vrfck {
regulator-max-microvolt = <1700000>;
};
mt6359_vrfck_1_ldo_reg: ldo_vrfck_1 {
regulator-name = "vrfck";
regulator-name = "vrfck_1";
regulator-min-microvolt = <1240000>;
regulator-max-microvolt = <1600000>;
};
@ -227,7 +227,7 @@ mt6359_vemc_ldo_reg: ldo_vemc {
regulator-max-microvolt = <3300000>;
};
mt6359_vemc_1_ldo_reg: ldo_vemc_1 {
regulator-name = "vemc";
regulator-name = "vemc_1";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3300000>;
};

2
arch/arm64/boot/dts/mediatek/mt6795.dtsi
View File

@ -371,7 +371,7 @@ pio: pinctrl@10005000 {
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pio 0 0 196>;
gpio-ranges = <&pio 0 0 197>;
interrupt-controller;
#interrupt-cells = <2>;
};

2
arch/arm64/boot/dts/mediatek/mt7981b.dtsi
View File

@ -332,7 +332,7 @@ pio: pinctrl@11d00000 {
interrupt-controller;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
gpio-ranges = <&pio 0 0 56>;
gpio-ranges = <&pio 0 0 57>;
gpio-controller;
#gpio-cells = <2>;
#interrupt-cells = <2>;

2
arch/arm64/boot/dts/mediatek/mt7986a.dtsi
View File

@ -187,7 +187,7 @@ pio: pinctrl@1001f000 {
"iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pio 0 0 100>;
gpio-ranges = <&pio 0 0 101>;
interrupt-controller;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;

2
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro-4e.dts
View File

@ -9,7 +9,7 @@
#include "mt7988a-bananapi-bpi-r4-pro.dtsi"
/ {
model = "Bananapi BPI-R4";
model = "Bananapi BPI-R4 Pro 4E";
compatible = "bananapi,bpi-r4-pro-4e",
"bananapi,bpi-r4-pro",
"mediatek,mt7988a";

2
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro-8x.dts
View File

@ -9,7 +9,7 @@
#include "mt7988a-bananapi-bpi-r4-pro.dtsi"
/ {
model = "Bananapi BPI-R4";
model = "Bananapi BPI-R4 Pro 8X";
compatible = "bananapi,bpi-r4-pro-8x",
"bananapi,bpi-r4-pro",
"mediatek,mt7988a";

70
arch/arm64/boot/dts/mediatek/mt8167.dtsi
View File

@ -29,12 +29,6 @@ infracfg: infracfg@10001000 {
#clock-cells = <1>;
};
apmixedsys: apmixedsys@10018000 {
compatible = "mediatek,mt8167-apmixedsys", "syscon";
reg = <0 0x10018000 0 0x710>;
#clock-cells = <1>;
};
scpsys: syscon@10006000 {
compatible = "mediatek,mt8167-scpsys", "syscon", "simple-mfd";
reg = <0 0x10006000 0 0x1000>;
@ -101,18 +95,6 @@ power-domain@MT8167_POWER_DOMAIN_CONN {
};
};
imgsys: syscon@15000000 {
compatible = "mediatek,mt8167-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
#clock-cells = <1>;
};
vdecsys: syscon@16000000 {
compatible = "mediatek,mt8167-vdecsys", "syscon";
reg = <0 0x16000000 0 0x1000>;
#clock-cells = <1>;
};
pio: pinctrl@1000b000 {
compatible = "mediatek,mt8167-pinctrl";
reg = <0 0x1000b000 0 0x1000>;
@ -124,21 +106,26 @@ pio: pinctrl@1000b000 {
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
};
apmixedsys: apmixedsys@10018000 {
compatible = "mediatek,mt8167-apmixedsys", "syscon";
reg = <0 0x10018000 0 0x710>;
#clock-cells = <1>;
};
iommu: m4u@10203000 {
compatible = "mediatek,mt8167-m4u";
reg = <0 0x10203000 0 0x1000>;
mediatek,larbs = <&larb0>, <&larb1>, <&larb2>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_LOW>;
#iommu-cells = <1>;
};
mmsys: syscon@14000000 {
compatible = "mediatek,mt8167-mmsys", "syscon";
reg = <0 0x14000000 0 0x1000>;
#clock-cells = <1>;
};
smi_common: smi@14017000 {
compatible = "mediatek,mt8167-smi-common";
reg = <0 0x14017000 0 0x1000>;
clocks = <&mmsys CLK_MM_SMI_COMMON>,
<&mmsys CLK_MM_SMI_COMMON>;
clock-names = "apb", "smi";
power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
};
larb0: larb@14016000 {
compatible = "mediatek,mt8167-smi-larb";
reg = <0 0x14016000 0 0x1000>;
@ -149,6 +136,21 @@ larb0: larb@14016000 {
power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
};
smi_common: smi@14017000 {
compatible = "mediatek,mt8167-smi-common";
reg = <0 0x14017000 0 0x1000>;
clocks = <&mmsys CLK_MM_SMI_COMMON>,
<&mmsys CLK_MM_SMI_COMMON>;
clock-names = "apb", "smi";
power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
};
imgsys: syscon@15000000 {
compatible = "mediatek,mt8167-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
#clock-cells = <1>;
};
larb1: larb@15001000 {
compatible = "mediatek,mt8167-smi-larb";
reg = <0 0x15001000 0 0x1000>;
@ -159,6 +161,12 @@ larb1: larb@15001000 {
power-domains = <&spm MT8167_POWER_DOMAIN_ISP>;
};
vdecsys: syscon@16000000 {
compatible = "mediatek,mt8167-vdecsys", "syscon";
reg = <0 0x16000000 0 0x1000>;
#clock-cells = <1>;
};
larb2: larb@16010000 {
compatible = "mediatek,mt8167-smi-larb";
reg = <0 0x16010000 0 0x1000>;
@ -168,13 +176,5 @@ larb2: larb@16010000 {
clock-names = "apb", "smi";
power-domains = <&spm MT8167_POWER_DOMAIN_VDEC>;
};
iommu: m4u@10203000 {
compatible = "mediatek,mt8167-m4u";
reg = <0 0x10203000 0 0x1000>;
mediatek,larbs = <&larb0>, <&larb1>, <&larb2>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_LOW>;
#iommu-cells = <1>;
};
};
};

38
arch/arm64/boot/dts/mediatek/mt8195-cherry-dojo-r1.dts
View File

@ -11,6 +11,28 @@ / {
compatible = "google,dojo-sku7", "google,dojo-sku5",
"google,dojo-sku3", "google,dojo-sku1",
"google,dojo", "mediatek,mt8195";
nvme-connector {
compatible = "pcie-m2-m-connector";
/* power is controlled by EC */
vpcie3v3-supply = <&pp3300_z2>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
nvme_ep: endpoint@0 {
reg = <0>;
remote-endpoint = <&pcie0_ep>;
};
};
};
};
};
&audio_codec {
@ -72,6 +94,22 @@ &pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins_default>;
status = "okay";
pcie@0 {
compatible = "pciclass,0604";
reg = <0 0 0 0 0>;
device_type = "pci";
num-lanes = <2>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
port {
pcie0_ep: endpoint {
remote-endpoint = <&nvme_ep>;
};
};
};
};
&pciephy {

58
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
View File

@ -83,6 +83,17 @@ pp3300_s3: regulator-pp3300-s3 {
vin-supply = <&pp3300_z2>;
};
pp3300_wlan: regulator-pp3300-wlan {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pp3300_wlan_en_pin>;
regulator-name = "pp3300_wlan";
/* load switch */
enable-active-high;
gpio = <&pio 58 GPIO_ACTIVE_HIGH>;
vin-supply = <&pp3300_z2>;
};
/* system wide 3.3V power rail */
pp3300_z2: regulator-pp3300-z2 {
compatible = "regulator-fixed";
@ -760,10 +771,25 @@ &ovl0_in {
};
&pcie1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins_default>;
status = "okay";
pcie@0 {
compatible = "pciclass,0604";
reg = <0 0 0 0 0>;
device_type = "pci";
num-lanes = <1>;
vpcie3v3-supply = <&pp3300_wlan>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@0 {
reg = <0 0 0 0 0>;
wakeup-source;
};
};
};
&pio {
@ -1179,12 +1205,6 @@ pins-vreg-en {
};
pio_default: pio-default-pins {
pins-wifi-enable {
pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
output-high;
drive-strength = <14>;
};
pins-low-power-pd {
pinmux = <PINMUX_GPIO25__FUNC_GPIO25>,
<PINMUX_GPIO26__FUNC_GPIO26>,
@ -1222,6 +1242,12 @@ pins-low-power-pupd {
};
};
pp3300_wlan_en_pin: pp3300-wlan-en-pins {
pins-en {
pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
};
};
rt1019p_pins_default: rt1019p-default-pins {
pins-amp-sdb {
pinmux = <PINMUX_GPIO100__FUNC_GPIO100>;
@ -1495,6 +1521,7 @@ &u3phy0 {
};
&u3phy1 {
/* shared between xhci1 and pcie1. */
status = "okay";
};
@ -1563,27 +1590,16 @@ &xhci0 {
vbus-supply = <&usb_vbus>;
};
&xhci1 {
status = "okay";
phys = <&u2port1 PHY_TYPE_USB2>;
rx-fifo-depth = <3072>;
vusb33-supply = <&mt6359_vusb_ldo_reg>;
vbus-supply = <&usb_vbus>;
mediatek,u3p-dis-msk = <1>;
};
&xhci2 {
status = "okay";
vbus-supply = <&usb_vbus>;
};
&xhci3 {
status = "okay";
/* MT7921's USB Bluetooth has issues with USB2 LPM */
usb2-lpm-disable;
vbus-supply = <&usb_vbus>;
vbus-supply = <&pp3300_wlan>;
status = "okay";
};
#include <arm/cros-ec-keyboard.dtsi>

4
arch/arm64/boot/dts/mediatek/mt8365-evk.dts
View File

@ -20,8 +20,10 @@ / {
compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
aliases {
serial0 = &uart0;
ethernet = &ethernet;
mmc0 = &mmc0;
mmc1 = &mmc1;
serial0 = &uart0;
};
chosen {

5
arch/arm64/boot/dts/mediatek/mt8365.dtsi
View File

@ -536,10 +536,9 @@ iommu: iommu@10205000 {
#iommu-cells = <1>;
};
infracfg_nao: infracfg@1020e000 {
compatible = "mediatek,mt8365-infracfg", "syscon";
infracfg_nao: syscon@1020e000 {
compatible = "mediatek,mt8365-infracfg-nao", "syscon";
reg = <0 0x1020e000 0 0x1000>;
#clock-cells = <1>;
};
rng: rng@1020f000 {

4
arch/arm64/boot/dts/mediatek/mt8395-genio-common.dtsi
View File

@ -18,8 +18,10 @@
/ {
aliases {
serial0 = &uart0;
ethernet0 = &eth;
mmc0 = &mmc0;
mmc1 = &mmc1;
serial0 = &uart0;
};
chosen {

4
arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
View File

@ -21,12 +21,14 @@ / {
compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195";
aliases {
ethernet0 = &eth;
i2c0 = &i2c2;
i2c1 = &i2c3;
i2c2 = &i2c4;
i2c3 = &i2c0;
i2c4 = &i2c1;
ethernet0 = &eth;
mmc0 = &mmc0;
mmc1 = &mmc1;
serial0 = &uart0;
serial1 = &uart1;
spi0 = &spi1;