github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-10-16 21:00:02 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

STM32 DT for v7.2, round 1

Browse Source 
Highlights:
 ----------
 
 - MPU:
   - STM32MP13:
     - Enable PHY SSC (Spread Spectrum) on DHCORE DHSBC board.
     - Add board pin documentation stm32mp135f-dk to help user.
 
   - STMP32MP15:
     -  Protonic:
       - Update MECIOR0 ans MECIOR1 boards:
         - Define ADC channels and GPIO line definitions in board and
 	  no longer in common file.
         - Fix ADC sampling.
 
   - STM32MP25:
     - Fix SAI addresses.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmodP1odHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIXicA//aqDL1wSznVUzqFRs
 edbrf6yrDKdkuNGxcf3g75QKFY6lN9e+6w26Ki+FN5Z0Es7HtOPiqZoMDXMR7vO5
 /nMxm9pOQ+EjCeyjhUppw2DOKvfFTKnxeURvMjh4Hx36jKuzkv+qCE1t628mMiEC
 NmaNF0gE5eashnDOab3IONJR+2XrCXOqJFnVBPD2F35trOFuEraxOhbXbiM91eoo
 Dr1cKhSLfuZN5qCY+xCs0dtnJTVQb5Cgg49RrJ/0Z2VkrUYrn03wUkV1FxHupEhH
 HNDsVm/aPiJ16KCdA6NYAIdBqqogsJZ+CspMj2oZr++gfVzhS+ifld59M+WtXX3q
 AZjSE7Ly6ViCA++Lz/hcnOggW/3kMBGuOxXHmIyxp5rch9fZuOyTzphk4kv8fbCW
 NJajh+Pfd2VfH1ceaXSxpfIi7wv8/5N7iy+U9sGP0wj4iuz9on17O7gSp8q5VZGq
 OyALOxgPykN+zPtl4aQHS7L837VX+wG7O/vj95RTxsW6hSD1RYoBODzpEwqoR734
 NQHMNpIT3UFhOJmyTAQkUTyTbwKjidCagq+aI76XwDPJt+e9RhYOpxJLseD4qELQ
 WyMCWPjHakZnKotwu20+IvPjg/CPn5xEveMuRZPUZm5MFgPBPoqIbCbkYPiF+SRJ
 sbXW6r3a4XsiwHQb5hXF5wkCt60=
 =FCDF
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v7.2, round 1

Highlights:
----------

- MPU:
  - STM32MP13:
    - Enable PHY SSC (Spread Spectrum) on DHCORE DHSBC board.
    - Add board pin documentation stm32mp135f-dk to help user.

  - STMP32MP15:
    -  Protonic:
      - Update MECIOR0 ans MECIOR1 boards:
        - Define ADC channels and GPIO line definitions in board and
	  no longer in common file.
        - Fix ADC sampling.

  - STM32MP25:
    - Fix SAI addresses.

* tag 'stm32-dt-for-7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  arm64: dts: st: Fix SAI addresses on stm32mp251
  ARM: dts: stm32: stm32mp15x-mecio1-io: Move expander gpio-line-names to board files
  ARM: dts: stm32: stm32mp15x-mecio1-io: Fix expander gpio line typo
  ARM: dts: stm32: stm32mp15x-mecio1-io: Move gpio-line-names to board files
  ARM: dts: stm32: stm32mp15x-mecio1-io: Fix GPIO names typo
  ARM: dts: stm32: stm32mp15x-mecio1-io: Move divergent mecio1 ADC channels to board files
  ARM: dts: stm32: stm32mp15x-mecio1-io: Fix ADC sampling times
  ARM: dts: stm32: stm32mp15x-mecio1-io: Enable internal ADC reference
  ARM: dts: stm32: add board pin documentation stm32mp135f-dk
  ARM: dts: stm32: Enable PHY SSC on DH STM32MP13xx DHCOR DHSBC board

Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Linus Walleij 2026-06-03 14:17:39 +02:00
commit 73f0e344f0
6 changed files with 320 additions and 138 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts
View File

@ -97,6 +97,8 @@ ethphy1: ethernet-phy@1 {
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
reg = <1>;
realtek,clkout-disable;
realtek,rxc-ssc-enable;
realtek,sysclk-ssc-enable;
reset-assert-us = <15000>;
reset-deassert-us = <55000>;
reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
@ -146,6 +148,8 @@ ethphy2: ethernet-phy@1 {
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
reg = <1>;
realtek,clkout-disable;
realtek,rxc-ssc-enable;
realtek,sysclk-ssc-enable;
reset-assert-us = <15000>;
reset-deassert-us = <55000>;
reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>;

28
arch/arm/boot/dts/st/stm32mp135f-dk.dts
View File

@ -64,6 +64,7 @@ gpio-keys {
compatible = "gpio-keys";
button-user {
/* GPIO on PA13 "User button 2 (B2)" */
label = "User-PA13";
linux,code = <BTN_1>;
gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
@ -74,6 +75,7 @@ leds {
compatible = "gpio-leds";
led_blue: led-blue {
/* GPIO on PA14 "User LED (LD3)" */
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
@ -82,6 +84,7 @@ led_blue: led-blue {
};
led-red {
/* GPIO on PA13 "User LED (LD4)" */
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
@ -252,6 +255,7 @@ phy0_eth1: ethernet-phy@0 {
&i2c1 {
pinctrl-names = "default", "sleep";
/* SDA on PE8 = CN8.27, SCL on PD12 = CN8.28 */
pinctrl-0 = <&i2c1_pins_a>;
pinctrl-1 = <&i2c1_sleep_pins_a>;
i2c-scl-rising-time-ns = <96>;
@ -486,7 +490,10 @@ counter {
status = "okay";
};
pwm {
/* PWM output on pin 7 of the expansion connector (CN8.7) using TIM3_CH4 func */
/*
* CH4 on PB1 = CN8.7;
* CH3 on PB0 = CN8.10 is possible (conflicting with usart1)
*/
pinctrl-0 = <&pwm3_pins_a>;
pinctrl-1 = <&pwm3_sleep_pins_a>;
pinctrl-names = "default", "sleep";
@ -505,7 +512,10 @@ counter {
status = "okay";
};
pwm {
/* PWM output on pin 31 of the expansion connector (CN8.31) using TIM4_CH2 func */
/*
* CH2 on PD13 = CN8.31;
* CH1 on PD12 = CN8.28 is possible (conflicting with &i2c1)
*/
pinctrl-0 = <&pwm4_pins_a>;
pinctrl-1 = <&pwm4_sleep_pins_a>;
pinctrl-names = "default", "sleep";
@ -524,7 +534,12 @@ counter {
status = "okay";
};
pwm {
/* PWM output on pin 32 of the expansion connector (CN8.32) using TIM8_CH3 func */
/*
* CH3 on PE5 = CN8.32
* CH1N on PA7 = CN8.36 is possible (conflicting with &usart1)
* CH2N on PB0 = CN8.10 is possible (conflicting with &usart1)
* CH3N on PB1 = CN8.7 is possible (conflicting with &timers3)
*/
pinctrl-0 = <&pwm8_pins_a>;
pinctrl-1 = <&pwm8_sleep_pins_a>;
pinctrl-names = "default", "sleep";
@ -541,7 +556,7 @@ counter {
status = "okay";
};
pwm {
/* PWM output on pin 33 of the expansion connector (CN8.33) using TIM14_CH1 func */
/* CH1 on PF9 = CN8.33 (alternatively on PA7 = CN8.36 (conflicting with &usart1)) */
pinctrl-0 = <&pwm14_pins_a>;
pinctrl-1 = <&pwm14_sleep_pins_a>;
pinctrl-names = "default", "sleep";
@ -553,6 +568,7 @@ timer@13 {
};
&uart4 {
/* Accessible via micro USB ST-LINK USB (CN10) */
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
@ -564,6 +580,7 @@ &uart4 {
&uart8 {
pinctrl-names = "default", "sleep", "idle";
/* TX on PE1 = CN8.37, RX on PF9 = CN8.33 */
pinctrl-0 = <&uart8_pins_a>;
pinctrl-1 = <&uart8_sleep_pins_a>;
pinctrl-2 = <&uart8_idle_pins_a>;
@ -574,6 +591,7 @@ &uart8 {
&usart1 {
pinctrl-names = "default", "sleep", "idle";
/* TX on PC0 = CN8.8, RX on PB0 = CN8.10, RTS on PC2 = CN8.11, CTS on PA7 = CN8.36 */
pinctrl-0 = <&usart1_pins_a>;
pinctrl-1 = <&usart1_sleep_pins_a>;
pinctrl-2 = <&usart1_idle_pins_a>;
@ -584,6 +602,7 @@ &usart1 {
/* Bluetooth */
&usart2 {
pinctrl-names = "default", "sleep", "idle";
/* TX on PH12, RX on PD15, RTS on PD4, CTS on PE11 */
pinctrl-0 = <&usart2_pins_a>;
pinctrl-1 = <&usart2_sleep_pins_a>;
pinctrl-2 = <&usart2_idle_pins_a>;
@ -613,6 +632,7 @@ hub@1 {
};
&usbotg_hs {
/* USB Type-C DRP (CN7) */
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
usb-role-switch;

128
arch/arm/boot/dts/st/stm32mp151c-mecio1r0.dts
View File

@ -36,6 +36,56 @@ led-1 {
};
};
&adc1 {
channel@0 {
reg = <0>;
st,min-sample-time-ns = <20000>;
label = "ain_aux0";
};
channel@1 {
reg = <1>;
st,min-sample-time-ns = <20000>;
label = "ain_aux1";
};
channel@3 {
reg = <3>;
st,min-sample-time-ns = <20000>;
label = "hpdcm1_i2";
};
channel@5 {
reg = <5>;
st,min-sample-time-ns = <20000>;
label = "pout1_i";
};
channel@9 {
reg = <9>;
st,min-sample-time-ns = <20000>;
label = "pout0_i";
};
channel@13 {
reg = <13>;
st,min-sample-time-ns = <200000>;
label = "phint1_ain";
};
channel@15 {
reg = <15>;
st,min-sample-time-ns = <20000>;
label = "hpdcm0_i1";
};
channel@18 {
reg = <18>;
st,min-sample-time-ns = <20000>;
label = "hpdcm0_i2";
};
};
&clk_hse {
clock-frequency = <25000000>;
};
@ -46,3 +96,81 @@ &ethernet0 {
assigned-clock-rates = <125000000>; /* Clock PLL3 to 625Mhz in tf-a. */
st,eth-clk-sel;
};
&gpio0 {
gpio-line-names = "HSIN0_BIAS", "HSIN1_BIAS", "HSIN2_BIAS", "HSIN3_BIAS",
"HSIN4_BIAS", "", "STP_VREF0_LVL", "HSIN_VREF0_LVL",
"STP0_FB_BIAS", "STP1_FB_BIAS", "STP2_FB_BIAS", "STP3_FB_BIAS",
"", "", "", "";
};
&gpio1 {
gpio-line-names = "HSIN5_BIAS", "HSIN6_BIAS", "HSIN7_BIAS", "HSIN8_BIAS",
"HSIN9_BIAS", "", "STP_VREF1_LVL", "HSIN_VREF1_LVL",
"STP4_FB_BIAS", "STP5_FB_BIAS", "STP6_FB_BIAS", "",
"", "", "LSIN8_BIAS", "LSIN9_BIAS";
};
&gpiod {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "", "",
"STP_RESETN", "STP_ENABLEN", "HPOUT0", "HPOUT0_ALERTN";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_d_mecsbc>;
};
&gpioe {
gpio-line-names = "HPOUT0_RESETN", "HPOUT1", "HPOUT1_ALERTN", "",
"", "", "HPOUT1_RESETN",
"LPOUT0", "LPOUT0_ALERTN", "LPOUT0_RESETN",
"LPOUT1", "LPOUT1_ALERTN", "LPOUT1_RESETN",
"LPOUT2", "LPOUT2_ALERTN", "LPOUT2_RESETN";
};
&gpiof {
gpio-line-names = "LPOUT3", "LPOUT3_ALERTN", "LPOUT3_RESETN",
"LPOUT4", "LPOUT4_ALERTN", "LPOUT4_RESETN",
"", "",
"", "", "", "",
"", "", "", "";
};
&gpiog {
gpio-line-names = "LPOUT5", "LPOUT5_ALERTN", "", "LPOUT5_RESETN",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpioh {
gpio-line-names = "", "", "", "",
"", "", "", "",
"GPIO0_RESETN", "", "", "",
"", "", "", "";
};
&gpioi {
gpio-line-names = "", "", "", "",
"", "", "", "",
"HPDCM0_SLEEPN", "HPDCM1_SLEEPN", "GPIO1_RESETN", "",
"", "", "", "";
};
&gpioj {
gpio-line-names = "HSIN10", "HSIN11", "HSIN12", "HSIN13",
"HSIN14", "HSIN15", "", "",
"", "", "", "",
"", "RTD_RESETN", "", "";
};
&gpiok {
gpio-line-names = "", "", "HSIN0", "HSIN1",
"HSIN2", "HSIN3", "HSIN4", "HSIN5";
};
&gpioz {
gpio-line-names = "", "", "", "HSIN6",
"HSIN7", "HSIN8", "HSIN9", "";
};

144
arch/arm/boot/dts/st/stm32mp153c-mecio1r1.dts
View File

@ -36,10 +36,154 @@ led-1 {
};
};
&adc1 {
channel@0 {
reg = <0>;
st,min-sample-time-ns = <20000>;
label = "p24v_hpdcm";
};
channel@1 {
reg = <1>;
st,min-sample-time-ns = <20000>;
label = "p24v_stp";
};
channel@3 {
reg = <3>;
st,min-sample-time-ns = <200000>;
label = "phint1_ain";
};
channel@5 {
reg = <5>;
st,min-sample-time-ns = <20000>;
label = "hpout1_i";
};
channel@9 {
reg = <9>;
st,min-sample-time-ns = <20000>;
label = "hpout0_i";
};
channel@13 {
reg = <13>;
st,min-sample-time-ns = <20000>;
label = "hpdcm0_i2";
};
channel@15 {
reg = <15>;
st,min-sample-time-ns = <20000>;
label = "hpdcm1_i2";
};
channel@18 {
reg = <18>;
st,min-sample-time-ns = <20000>;
label = "hpdcm0_i1";
};
};
&clk_hse {
clock-frequency = <24000000>;
};
&gpio0 {
gpio-line-names = "HSIN0_BIAS", "HSIN1_BIAS", "HSIN2_BIAS", "HSIN3_BIAS",
"", "", "HSIN_VREF0_LVL", "HSIN_VREF1_LVL",
"HSIN4_BIAS", "HSIN5_BIAS", "HSIN6_BIAS", "HSIN7_BIAS",
"", "", "", "";
};
&gpio1 {
gpio-line-names = "HSIN8_BIAS", "HSIN9_BIAS", "HSIN10_BIAS", "HSIN11_BIAS",
"", "", "HSIN_VREF2_LVL", "HSIN_VREF3_LVL",
"HSIN12_BIAS", "HSIN13_BIAS", "HSIN14_BIAS", "HSIN15_BIAS",
"", "", "LSIN8_BIAS", "LSIN9_BIAS";
};
&gpioa {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "GPIO1_RESETN", "",
"", "", "", "LPOUT5";
};
&gpiob {
gpio-line-names = "", "", "", "",
"LPOUT4_RESETN", "", "", "",
"", "LPOUT4_ALERTN", "", "",
"", "", "", "";
};
&gpioc {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "LPOUT4", "", "",
"", "", "", "";
};
&gpiod {
gpio-line-names = "LPOUT2", "", "LPOUT3_RESETN", "",
"LPOUT2_ALERTN", "", "MECIO_ADDR0", "",
"HPOUT1_ALERTN", "HPOUT1_RESETN", "", "",
"", "", "HPOUT0", "HPOUT1";
};
&gpioe {
gpio-line-names = "LPOUT0_RESETN", "", "", "",
"", "LPOUT3", "LPOUT5_ALERTN", "",
"", "", "", "",
"", "", "", "HSIN_RESETN";
};
&gpiof {
gpio-line-names = "LPOUT5_RESETN", "", "", "HPOUT0_ALERTN",
"", "LPOUT1", "", "",
"", "", "", "",
"", "", "", "";
};
&gpiog {
gpio-line-names = "", "", "", "HPOUT0_RESETN",
"", "", "LPOUT3_ALERTN", "",
"", "", "GPIO0_RESETN", "",
"", "", "", "LPOUT2_RESETN";
};
&gpioh {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "LPOUT0", "", "",
"", "LPOUT0_ALERTN", "STP_ENABLEN", "STP_RESETN";
};
&gpioi {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "SPE_RESETN", "",
"HPDCM0_SLEEPN", "", "", "";
};
&gpioj {
gpio-line-names = "", "", "", "",
"", "", "", "MECIO_ADDR1",
"", "", "", "",
"", "", "", "LPOUT1_RESETN";
};
&gpiok {
gpio-line-names = "", "", "RTD_RESETN", "",
"", "LPOUT1_ALERTN", "", "";
};
&gpioz {
gpio-line-names = "", "", "", "",
"HPDCM1_SLEEPN", "", "", "";
};
&m_can1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&m_can1_pins_b>;

146
arch/arm/boot/dts/st/stm32mp15x-mecio1-io.dtsi
View File

@ -90,94 +90,45 @@ v5v: regulator-v5v {
};
&adc {
/* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
/* ANA0, ANA1 are dedicated pins and don't need pinctrl. */
pinctrl-0 = <&adc12_pins_mecsbc>;
pinctrl-names = "default";
vdd-supply = <&v3v3>;
vdda-supply = <&v3v3>;
vref-supply = <&v3v3>;
vref-supply = <&vrefbuf>;
status = "okay";
};
&adc1 {
status = "okay";
channel@0 {
reg = <0>;
/* 16.5 ck_cycles sampling time */
st,min-sample-time-ns = <5000>;
label = "p24v_stp";
};
channel@1 {
reg = <1>;
st,min-sample-time-ns = <5000>;
label = "p24v_hpdcm";
};
channel@2 {
reg = <2>;
st,min-sample-time-ns = <5000>;
st,min-sample-time-ns = <20000>;
label = "ain0";
};
channel@3 {
reg = <3>;
st,min-sample-time-ns = <5000>;
label = "hpdcm1_i2";
};
channel@5 {
reg = <5>;
st,min-sample-time-ns = <5000>;
label = "hpout1_i";
};
channel@6 {
reg = <6>;
st,min-sample-time-ns = <5000>;
st,min-sample-time-ns = <20000>;
label = "ain1";
};
channel@9 {
reg = <9>;
st,min-sample-time-ns = <5000>;
label = "hpout0_i";
};
channel@10 {
reg = <10>;
st,min-sample-time-ns = <5000>;
st,min-sample-time-ns = <200000>;
label = "phint0_ain";
};
channel@13 {
reg = <13>;
st,min-sample-time-ns = <5000>;
label = "phint1_ain";
};
channel@15 {
reg = <15>;
st,min-sample-time-ns = <5000>;
label = "hpdcm0_i1";
};
channel@16 {
reg = <16>;
st,min-sample-time-ns = <5000>;
st,min-sample-time-ns = <20000>;
label = "lsin";
};
channel@18 {
reg = <18>;
st,min-sample-time-ns = <5000>;
label = "hpdcm0_i2";
};
channel@19 {
reg = <19>;
st,min-sample-time-ns = <5000>;
st,min-sample-time-ns = <20000>;
label = "hpdcm1_i1";
};
};
@ -187,14 +138,13 @@ &adc2 {
channel@2 {
reg = <2>;
/* 16.5 ck_cycles sampling time */
st,min-sample-time-ns = <5000>;
st,min-sample-time-ns = <20000>;
label = "ain2";
};
channel@6 {
reg = <6>;
st,min-sample-time-ns = <5000>;
st,min-sample-time-ns = <20000>;
label = "ain3";
};
};
@ -223,69 +173,6 @@ phy0: ethernet-phy@8 {
};
};
&gpiod {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "", "",
"STP_RESETN", "STP_ENABLEN", "HPOUT0", "HPOUT0_ALERTN";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_d_mecsbc>;
};
&gpioe {
gpio-line-names = "HPOUT0_RESETN", "HPOUT1", "HPOUT1_ALERTN", "",
"", "", "HPOUT1_RESETN",
"LPOUT0", "LPOUT0_ALERTN", "GPOUT0_RESETN",
"LPOUT1", "LPOUT1_ALERTN", "GPOUT1_RESETN",
"LPOUT2", "LPOUT2_ALERTN", "GPOUT2_RESETN";
};
&gpiof {
gpio-line-names = "LPOUT3", "LPOUT3_ALERTN", "GPOUT3_RESETN",
"LPOUT4", "LPOUT4_ALERTN", "GPOUT4_RESETN",
"", "",
"", "", "", "",
"", "", "", "";
};
&gpiog {
gpio-line-names = "LPOUT5", "LPOUT5_ALERTN", "", "LPOUT5_RESETN",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpioh {
gpio-line-names = "", "", "", "",
"", "", "", "",
"GPIO0_RESETN", "", "", "",
"", "", "", "";
};
&gpioi {
gpio-line-names = "", "", "", "",
"", "", "", "",
"HPDCM0_SLEEPN", "HPDCM1_SLEEPN", "GPIO1_RESETN", "",
"", "", "", "";
};
&gpioj {
gpio-line-names = "HSIN10", "HSIN11", "HSIN12", "HSIN13",
"HSIN14", "HSIN15", "", "",
"", "", "", "",
"", "RTD_RESETN", "", "";
};
&gpiok {
gpio-line-names = "", "", "HSIN0", "HSIN1",
"HSIN2", "HSIN3", "HSIN4", "HSIN5";
};
&gpioz {
gpio-line-names = "", "", "", "HSIN6",
"HSIN7", "HSIN8", "HSIN9", "";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
@ -297,10 +184,6 @@ gpio0: gpio@20 {
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "HSIN0_BIAS", "HSIN1_BIAS", "HSIN2_BIAS", "HSIN3_BIAS",
"", "", "HSIN_VREF0_LVL", "HSIN_VREF1_LVL",
"HSIN4_BIAS", "HSIN5_BIAS", "HSIN6_BIAS", "HSIN9_BIAS",
"", "", "", "";
};
gpio1: gpio@21 {
@ -308,10 +191,6 @@ gpio1: gpio@21 {
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "HSIN8_BIAS", "HSIN9_BIAS", "HSIN10_BIAS", "HSIN11_BIAS",
"", "", "HSIN_VREF2_LVL", "HSIN_VREF3_LVL",
"HSIN12_BIAS", "HSIN13_BIAS", "HSIN14_BIAS", "HSIN15_BIAS",
"", "", "LSIN8_BIAS", "LSIN9_BIAS";
};
};
@ -412,6 +291,13 @@ &usbphyc_port1 {
phy-supply = <&v3v3>;
};
&vrefbuf {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
vdda-supply = <&v3v3>;
status = "okay";
};
&pinctrl {
adc12_pins_mecsbc: adc12-ain-mecsbc-0 {
pins {

8
arch/arm64/boot/dts/st/stm32mp251.dtsi
View File

@ -1202,7 +1202,7 @@ spi5: spi@40280000 {
sai1: sai@40290000 {
compatible = "st,stm32mp25-sai";
reg = <0x40290000 0x4>, <0x4029a3f0 0x10>;
reg = <0x40290000 0x4>, <0x402903f0 0x10>;
ranges = <0 0x40290000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
@ -1236,7 +1236,7 @@ sai1b: audio-controller@40290024 {
sai2: sai@402a0000 {
compatible = "st,stm32mp25-sai";
reg = <0x402a0000 0x4>, <0x402aa3f0 0x10>;
reg = <0x402a0000 0x4>, <0x402a03f0 0x10>;
ranges = <0 0x402a0000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
@ -1270,7 +1270,7 @@ sai2b: audio-controller@402a0024 {
sai3: sai@402b0000 {
compatible = "st,stm32mp25-sai";
reg = <0x402b0000 0x4>, <0x402ba3f0 0x10>;
reg = <0x402b0000 0x4>, <0x402b03f0 0x10>;
ranges = <0 0x402b0000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
@ -1362,7 +1362,7 @@ usart1: serial@40330000 {
sai4: sai@40340000 {
compatible = "st,stm32mp25-sai";
reg = <0x40340000 0x4>, <0x4034a3f0 0x10>;
reg = <0x40340000 0x4>, <0x403403f0 0x10>;
ranges = <0 0x40340000 0x400>;
#address-cells = <1>;
#size-cells = <1>;