github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-07-28 01:55:51 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

Samsung DTS ARM64 changes for v7.2

Browse Source 
1. Exynos850: Implement proper power off to fully shutdown the board and
    reduce drawn current.
 
 2. ExynosAutov920: Add UFS storage.
 
 3. Add Peter Griffin as a co-maintainer.
    I have multiple subsystems to care of and limited time. Also, with
    joining to SoC team I figured out it is good to plan my succession.
    Or backup.
 
    Peter shown both time and interest in keeping Samsung Exynos code
    working.  He already works on and maintains Google Tensor SoC, which
    shares a lot with Samsung Exynos processors.
    Considering all this, I proposed Peter to become a co-maintainer here
    (same for pinctrl, which went via different tree).
 
    I will still be the one handling patches for this and (probably) next
    cycle, but in a further timeframe the roles could reverse with me
    only providing acks or reviews. If this works then depending on other
    duties and amount of work, I might be slowly transitioning to leave
    Samsung SoC maintainership.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmocJCMQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD11V8D/9Xi4QVtgGivuu6lpggX/VCLY7TVvDUxZQG
 1Ba5ggyW/TCGTUCC2k4kQKpO1J34/jBB3JCooIJV5K1rfcoClIxkrOD58ClxDeIh
 Nf4lUVxyTRLL2HkFGh/ZI5a1NrCve1x+Lj2J36DAVKUGI7UciJRHqXud37grVid3
 dOVNE6N5UGew1cbRCO0ej4G///+y4exKagX5oLcNRA5o9+t0/xwCTbZg60Jv3/xm
 BjPLs75CwDu5+OpnKAPcjZg12AimoIlB8o95l0WU5AggkhEfNFJ6l8EgXfmv9SBr
 +/1+N2Hlw6AzDDuzDpy9pDk3rvAozR0mRoYKrC/YWoJfykligMsgtmY5cHAmbPyj
 IPf8lbqQnDpCr4Px9YBt378bi+7DZt2qCuBgbHkhprlLFbLN+P+48EU3ClsZrSFz
 B09FfIc3eWj9+gzq2ymuYrUV+CGDkw4u7aoWLqcTXYgUPRNMkPKC0y2lLehriJMO
 hW88iUf+wgtdOLxfKuIBUReEU4+G1T8b7gfRSLQpaqLPNob7j0G5Y629LQAZtHOc
 vAAmloJDepAD0eA8ezLIN+XgEhlipgTnIesQ0FqRBvh2pIT67VkpQm8mBhIsLmWe
 WIh7ApcZMIH3bRh6aYAZV8jJqbtZeLqEyasqoM6NZ7Y0DxGXCdC5Z/9HZ2WNYVJg
 GbNn2/iXYQ==
 =KSPN
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v7.2

1. Exynos850: Implement proper power off to fully shutdown the board and
   reduce drawn current.

2. ExynosAutov920: Add UFS storage.

3. Add Peter Griffin as a co-maintainer.
   I have multiple subsystems to care of and limited time. Also, with
   joining to SoC team I figured out it is good to plan my succession.
   Or backup.

   Peter shown both time and interest in keeping Samsung Exynos code
   working.  He already works on and maintains Google Tensor SoC, which
   shares a lot with Samsung Exynos processors.
   Considering all this, I proposed Peter to become a co-maintainer here
   (same for pinctrl, which went via different tree).

   I will still be the one handling patches for this and (probably) next
   cycle, but in a further timeframe the roles could reverse with me
   only providing acks or reviews. If this works then depending on other
   duties and amount of work, I might be slowly transitioning to leave
   Samsung SoC maintainership.

* tag 'samsung-dt64-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  MAINTAINERS: Add Peter Griffin as a co-maintainer of Samsung Exynos SoCs
  arm64: dts: exynos: Add EL2 virtual timer interrupt
  arm64: dts: exynosautov920: enable support for ufs controller
  arm64: dts: exynosautov920: Add syscon hsi2 node
  arm64: dts: exynos850: Add syscon-poweroff node

Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Linus Walleij 2026-06-03 14:17:06 +02:00
commit 06deee1369
9 changed files with 54 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
MAINTAINERS
View File

@ -3430,6 +3430,7 @@ K: (?:\b|_)ROCKCHIP(?:\b|_)
ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES
M: Krzysztof Kozlowski <krzk@kernel.org>
M: Peter Griffin <peter.griffin@linaro.org>
R: Alim Akhtar <alim.akhtar@samsung.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-samsung-soc@vger.kernel.org
@ -23842,6 +23843,7 @@ SAMSUNG SOC CLOCK DRIVERS
M: Krzysztof Kozlowski <krzk@kernel.org>
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
M: Chanwoo Choi <cw00.choi@samsung.com>
M: Peter Griffin <peter.griffin@linaro.org>
R: Alim Akhtar <alim.akhtar@samsung.com>
L: linux-samsung-soc@vger.kernel.org
S: Maintained

3
arch/arm64/boot/dts/exynos/axis/artpec9.dtsi
View File

@ -272,6 +272,7 @@ timer {
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
};
};

3
arch/arm64/boot/dts/exynos/exynos2200.dtsi
View File

@ -1911,7 +1911,8 @@ timer {
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 12 IRQ_TYPE_LEVEL_LOW 0>;
/*
* Non-updatable, broken stock Samsung bootloader does not
* configure CNTFRQ_EL0

7
arch/arm64/boot/dts/exynos/exynos850.dtsi
View File

@ -215,6 +215,13 @@ pmu_system_controller: system-controller@11860000 {
compatible = "samsung,exynos850-pmu", "syscon";
reg = <0x11860000 0x10000>;
poweroff: syscon-poweroff {
compatible = "syscon-poweroff";
offset = <0x30c>; /* PS_HOLD_CONTROL */
mask = <0x00000100>;
value = <0x0>;
};
reboot: syscon-reboot {
compatible = "syscon-reboot";
regmap = <&pmu_system_controller>;

3
arch/arm64/boot/dts/exynos/exynos990.dtsi
View File

@ -405,7 +405,8 @@ timer {
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
/*
* Non-updatable, broken stock Samsung bootloader does not

3
arch/arm64/boot/dts/exynos/exynosautov9.dtsi
View File

@ -148,7 +148,8 @@ timer {
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
fixed-rate-clocks {

8
arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts
View File

@ -83,6 +83,14 @@ &usi_0 {
status = "okay";
};
&ufs_0 {
status = "okay";
};
&ufs_0_phy {
status = "okay";
};
&xtcxo {
clock-frequency = <38400000>;
};

27
arch/arm64/boot/dts/exynos/exynosautov920.dtsi
View File

@ -1426,6 +1426,12 @@ cmu_hsi2: clock-controller@16b00000 {
"ethernet";
};
syscon_hsi2: syscon@16c00000 {
compatible = "samsung,exynosautov920-hsi2-sysreg",
"syscon";
reg = <0x16c00000 0x800>;
};
pinctrl_hsi2: pinctrl@16c10000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x16c10000 0x10000>;
@ -1438,6 +1444,27 @@ pinctrl_hsi2ufs: pinctrl@16d20000 {
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
};
ufs_0: ufs@16e00000 {
compatible = "samsung,exynosautov920-ufs";
reg = <0x16e00000 0x100>,
<0x16e01100 0x400>,
<0x16e80000 0x8000>,
<0x16d08000 0x800>;
reg-names = "hci", "vs_hci", "unipro", "ufsp";
interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_hsi2 CLK_MOUT_HSI2_UFS_EMBD_USER>,
<&cmu_hsi2 CLK_MOUT_HSI2_NOC_UFS_USER>;
clock-names = "core_clk", "sclk_unipro_main";
freq-table-hz = <0 0>, <0 0>;
pinctrl-names = "default";
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
phys = <&ufs_0_phy>;
phy-names = "ufs-phy";
samsung,sysreg = <&syscon_hsi2 0x710>;
dma-coherent;
status = "disabled";
};
ufs_0_phy: phy@16e04000 {
compatible = "samsung,exynosautov920-ufs-phy";
reg = <0x16e04000 0x4000>;

3
arch/arm64/boot/dts/exynos/google/gs101.dtsi
View File

@ -1856,7 +1856,8 @@ timer {
<GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>;
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>;
};
};