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clk: qcom: gpucc-qcm2290: Keep the critical clocks always-on from probe

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Drop modelling of gpu_cc_ahb_clk and keep it always enabled from probe
similar to other critical clocks, since marking it as CLK_IS_CRITICAL
causes the clock framework to invoke clk_pm_runtime_get() during prepare,
which prevents the associated power domains from collapsing.

Fixes: 8cab033628 ("clk: qcom: Add QCM2290 GPU clock controller driver")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260718-shikra-dispcc-gpucc-v6-10-62703e05ef0f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Imran Shaik 2026-07-18 18:26:17 +05:30 committed by Bjorn Andersson
parent 1b4599bc20
commit 7274ea68d2
1 changed files with 1 additions and 15 deletions
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16
drivers/clk/qcom/gpucc-qcm2290.c
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@ -149,20 +149,6 @@ static struct clk_rcg2 gpu_cc_gx_gfx3d_clk_src = {
},
};
static struct clk_branch gpu_cc_ahb_clk = {
.halt_reg = 0x1078,
.halt_check = BRANCH_HALT_DELAY,
.clkr = {
.enable_reg = 0x1078,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gpu_cc_ahb_clk",
.flags = CLK_IS_CRITICAL,
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch gpu_cc_crc_ahb_clk = {
.halt_reg = 0x107c,
.halt_check = BRANCH_HALT_DELAY,
@ -325,7 +311,6 @@ static struct gdsc gpu_gx_gdsc = {
};
static struct clk_regmap *gpu_cc_qcm2290_clocks[] = {
[GPU_CC_AHB_CLK] = &gpu_cc_ahb_clk.clkr,
[GPU_CC_CRC_AHB_CLK] = &gpu_cc_crc_ahb_clk.clkr,
[GPU_CC_CX_GFX3D_CLK] = &gpu_cc_cx_gfx3d_clk.clkr,
[GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
@ -354,6 +339,7 @@ static struct clk_alpha_pll *gpu_cc_qcm2290_plls[] = {
};
static const u32 gpu_cc_qcm2290_critical_cbcrs[] = {
0x1078, /* GPU_CC_AHB_CLK */
0x1060, /* GPU_CC_GX_CXO_CLK */
};