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Merge tag 'tegra-for-6.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

Browse Source 
ARM: tegra: Device tree changes for v6.2-rc1

This fixes various minor issues in device trees that are flagged by the
DT validation tools.

* tag 'tegra-for-6.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Remove duplicate pin entry in pinmux
  ARM: tegra: Remove unused interrupt-parent properties
  ARM: tegra: Fix nvidia,io-reset properties
  ARM: tegra: Add missing power-supply for panels
  ARM: tegra: Fixup pinmux node names
  ARM: tegra: Use correct compatible string for ASUS TF101 panel

Link: https://lore.kernel.org/r/20221119012025.3968358-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-11-21 11:03:55 +01:00
commit 714aac5dcd
No known key found for this signature in database
GPG Key ID: 9A6C79EFE60018D9
11 changed files with 42 additions and 44 deletions
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24
arch/arm/boot/dts/tegra114-asus-tf701t.dts
View File

@ -80,7 +80,7 @@ panel_secondary: panel@0 {
};
pinmux@70000868 {
asus_pad_ec_default: asus-pad-ec-default {
asus_pad_ec_default: pinmux-asus-pad-ec-default {
ec-interrupt {
nvidia,pins = "kb_col5_pq5";
nvidia,function = "kbc";
@ -98,7 +98,7 @@ ec-request {
};
};
backlight_default: backlight-default {
backlight_default: pinmux-backlight-default {
backlight-enable {
nvidia,pins = "gmi_ad10_ph2";
nvidia,function = "gmi";
@ -108,7 +108,7 @@ backlight-enable {
};
};
codec_default: codec-default {
codec_default: pinmux-codec-default {
ldo1-en {
nvidia,pins = "sdmmc1_wp_n_pv3";
nvidia,function = "sdmmc1";
@ -127,7 +127,7 @@ interrupt {
};
};
gpio_keys_default: gpio-keys-default {
gpio_keys_default: pinmux-gpio-keys-default {
power {
nvidia,pins = "kb_col0_pq0";
nvidia,function = "kbc";
@ -146,7 +146,7 @@ volume {
};
};
gpio_hall_sensor_default: gpio-hall-sensor-default {
gpio_hall_sensor_default: pinmux-gpio-hall-sensor-default {
ulpi_data4_po5 {
nvidia,pins = "ulpi_data4_po5";
nvidia,function = "spi2";
@ -156,7 +156,7 @@ ulpi_data4_po5 {
};
};
hp_det_default: hp-det-default {
hp_det_default: pinmux-hp-det-default {
gmi_iordy_pi5 {
nvidia,pins = "kb_row7_pr7";
nvidia,function = "rsvd2";
@ -166,7 +166,7 @@ gmi_iordy_pi5 {
};
};
imu_default: imu-default {
imu_default: pinmux-imu-default {
kb_row3_pr3 {
nvidia,pins = "kb_row3_pr3";
nvidia,function = "rsvd3";
@ -176,7 +176,7 @@ kb_row3_pr3 {
};
};
pwm_default: pwm-default {
pwm_default: pinmux-pwm-default {
gmi_ad9_ph1 {
nvidia,pins = "gmi_ad9_ph1";
nvidia,function = "pwm1";
@ -187,7 +187,7 @@ gmi_ad9_ph1 {
};
/* XXX make this something more sensible */
pwm_sleep: pwm-sleep {
pwm_sleep: pinmux-pwm-sleep {
gmi_ad9_ph1 {
nvidia,pins = "gmi_ad9_ph1";
nvidia,function = "pwm1";
@ -197,7 +197,7 @@ gmi_ad9_ph1 {
};
};
sdmmc3_default: sdmmc3-default {
sdmmc3_default: pinmux-sdmmc3-default {
sdmmc3_clk_pa6 {
nvidia,pins = "sdmmc3_clk_pa6";
nvidia,function = "sdmmc3";
@ -233,7 +233,7 @@ drive_sdio3 {
};
};
sdmmc3_vdd_default: sdmmc3-vdd-default {
sdmmc3_vdd_default: pinmux-sdmmc3-vdd-default {
gmi_clk_pk1 {
nvidia,pins = "gmi_clk_pk1";
nvidia,function = "gmi";
@ -243,7 +243,7 @@ gmi_clk_pk1 {
};
};
vdd_lcd_default: vdd-lcd-default {
vdd_lcd_default: pinmux-vdd-lcd-default {
sdmmc4_clk_pcc4 {
nvidia,pins = "sdmmc4_clk_pcc4";
nvidia,function = "sdmmc4";

3
arch/arm/boot/dts/tegra124-nyan-big.dts
View File

@ -18,6 +18,7 @@ dpaux@545c0000 {
aux-bus {
panel: panel {
compatible = "auo,b133xtn01";
power-supply = <&vdd_3v3_panel>;
backlight = <&backlight>;
};
};
@ -39,7 +40,7 @@ pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_default>;
pinmux_default: common {
pinmux_default: pinmux {
clk_32k_out_pa0 {
nvidia,pins = "clk_32k_out_pa0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;

3
arch/arm/boot/dts/tegra124-nyan-blaze.dts
View File

@ -20,6 +20,7 @@ dpaux@545c0000 {
aux-bus {
panel: panel {
compatible = "samsung,ltn140at29-301";
power-supply = <&vdd_3v3_panel>;
backlight = <&backlight>;
};
};
@ -37,7 +38,7 @@ pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_default>;
pinmux_default: common {
pinmux_default: pinmux {
clk_32k_out_pa0 {
nvidia,pins = "clk_32k_out_pa0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;

3
arch/arm/boot/dts/tegra124-venice2.dts
View File

@ -52,6 +52,7 @@ dpaux@545c0000 {
aux-bus {
panel: panel {
compatible = "lg,lp129qe";
power-supply = <&vdd_3v3_panel>;
backlight = <&backlight>;
};
};
@ -70,7 +71,7 @@ pinmux: pinmux@70000868 {
pinctrl-names = "boot";
pinctrl-0 = <&pinmux_boot>;
pinmux_boot: common {
pinmux_boot: pinmux {
dap_mclk1_pw4 {
nvidia,pins = "dap_mclk1_pw4";
nvidia,function = "extperiph1";

6
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
View File

@ -342,7 +342,7 @@ drive_dbg {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
@ -353,7 +353,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
@ -364,7 +364,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";

8
arch/arm/boot/dts/tegra20-asus-tf101.dts
View File

@ -399,7 +399,7 @@ drive_csus {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
@ -411,7 +411,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
@ -423,7 +423,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
@ -1019,7 +1019,7 @@ key-volume-down {
};
display-panel {
compatible = "panel-lvds";
compatible = "auo,b101ew05", "panel-lvds";
/* AUO B101EW05 using custom timings */

6
arch/arm/boot/dts/tegra20-seaboard.dts
View File

@ -285,7 +285,7 @@ drive_sdio1 {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
@ -296,7 +296,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
@ -307,7 +307,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";

6
arch/arm/boot/dts/tegra20-tamonten.dtsi
View File

@ -249,7 +249,7 @@ conf_ld17_0 {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
@ -260,7 +260,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
@ -271,7 +271,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";

6
arch/arm/boot/dts/tegra20-ventana.dts
View File

@ -284,7 +284,7 @@ drive_sdio1 {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
@ -295,7 +295,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
@ -306,7 +306,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";

10
arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
View File

@ -168,7 +168,7 @@ vi_d8_pl6 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
/* SDMMC3 pinmux */
@ -711,7 +711,7 @@ vi_pclk_pt0 {
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
/* GPIO keys pinmux */
@ -805,7 +805,7 @@ vi_vsync_pd6 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
vi_d10_pt2 {
@ -937,7 +937,7 @@ vi_d6_pl4 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
vi_mclk_pt1 {
@ -1509,7 +1509,6 @@ cpu3: cpu@3 {
extcon-keys {
compatible = "gpio-keys";
interrupt-parent = <&gpio>;
switch-dock-hall-sensor {
label = "Lid sensor";
@ -1542,7 +1541,6 @@ trusted-foundations {
gpio-keys {
compatible = "gpio-keys";
interrupt-parent = <&gpio>;
key-power {
label = "Power";

11
arch/arm/boot/dts/tegra30-pegatron-chagall.dts
View File

@ -134,7 +134,7 @@ vi_d8_pl6 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
/* SDMMC3 pinmux */
@ -150,7 +150,6 @@ sdmmc3_cmd_pa7 {
nvidia,pins = "sdmmc3_cmd_pa7",
"sdmmc3_dat3_pb4",
"sdmmc3_dat2_pb5",
"sdmmc3_dat2_pb5",
"sdmmc3_dat1_pb6",
"sdmmc3_dat0_pb7",
"sdmmc3_dat5_pd0",
@ -622,7 +621,7 @@ vi_pclk_pt0 {
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
pu1 {
@ -689,7 +688,7 @@ vi_vsync_pd6 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
vi_d10_pt2 {
@ -864,7 +863,7 @@ vi_d6_pl4 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,lock = <0>;
nvidia,ioreset = <0>;
nvidia,io-reset = <0>;
};
vi_mclk_pt1 {
@ -2653,7 +2652,6 @@ panel-timing {
extcon-keys {
compatible = "gpio-keys";
interrupt-parent = <&gpio>;
switch-dock-insert {
label = "Chagall Dock";
@ -2686,7 +2684,6 @@ trusted-foundations {
gpio-keys {
compatible = "gpio-keys";
interrupt-parent = <&gpio>;
key-power {
label = "Power";