arm64: dts: imx8ulp-evk: Change the values of some PCRs of ENET

Change to use standard drive strength and slow slew rate on
PTE14-17, 22, 23, otherwise the overshoot of ENET is too high.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Wei Fang 2026-07-20 22:12:16 +08:00 committed by Frank Li
parent 35bdffecf9
commit 7108abc25f

View File

@ -323,15 +323,15 @@ &mu {
&iomuxc1 {
pinctrl_enet: enetgrp {
fsl,pins = <
MX8ULP_PAD_PTE15__ENET0_MDC 0x43
MX8ULP_PAD_PTE14__ENET0_MDIO 0x43
MX8ULP_PAD_PTE17__ENET0_RXER 0x43
MX8ULP_PAD_PTE15__ENET0_MDC 0x7
MX8ULP_PAD_PTE14__ENET0_MDIO 0x7
MX8ULP_PAD_PTE17__ENET0_RXER 0x7
MX8ULP_PAD_PTE18__ENET0_CRS_DV 0x43
MX8ULP_PAD_PTF1__ENET0_RXD0 0x43
MX8ULP_PAD_PTE20__ENET0_RXD1 0x43
MX8ULP_PAD_PTE16__ENET0_TXEN 0x43
MX8ULP_PAD_PTE23__ENET0_TXD0 0x43
MX8ULP_PAD_PTE22__ENET0_TXD1 0x43
MX8ULP_PAD_PTE16__ENET0_TXEN 0x7
MX8ULP_PAD_PTE23__ENET0_TXD0 0x7
MX8ULP_PAD_PTE22__ENET0_TXD1 0x7
MX8ULP_PAD_PTE19__ENET0_REFCLK 0x43
MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43
>;