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net: eth: fbnic: Fix addr validation in pcs write

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The DW IP has two distinct PCS address ranges cooresponding
to the C45 PCS registers.

The shim translates the PCS addr/regno into specific CSR writes
into one of those two zero-relative ranges.

This patch fixes a one off in the test that could allow an invalid
CSR write if an addr == 2 was called.

There are is of yet, no real impact for the bug as no PCS writes are
present.

Signed-off-by: Mike Marciniszyn (Meta) <mike.marciniszyn@gmail.com>
Link: https://patch.msgid.link/20260507154203.3667-1-mike.marciniszyn@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Mike Marciniszyn (Meta) 2026-05-07 11:42:03 -04:00 committed by Jakub Kicinski
parent 8b2feced65
commit 70f764ecca
1 changed files with 1 additions and 1 deletions
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2
drivers/net/ethernet/meta/fbnic/fbnic_mdio.c
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@ -189,7 +189,7 @@ fbnic_mdio_write_pcs(struct fbnic_dev *fbd, int addr, int regnum, u16 val)
addr, regnum, val);
/* Allow access to both halves of PCS for 50R2 config */
if (addr > 2)
if (addr >= 2)
return;
/* Skip write for reserved registers */