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arm64: dts: mediatek: mt8390-genio-common: Add Display on DSI0

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Configure the DSI0 display pipeline and add regulator, pinctrl
and display node to enable the Startek KD070FHFID078 panel found
on the MediaTek Genio 510 and Genio 700 EVKs.

Link: https://lore.kernel.org/r/20250220110948.45596-3-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
This commit is contained in:
AngeloGioacchino Del Regno 2025-02-20 12:09:46 +01:00
parent 21ce589654
commit 7081ba442f
No known key found for this signature in database
GPG Key ID: 9A3604CFAD978478
1 changed files with 137 additions and 8 deletions
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145
arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi
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@ -21,6 +21,7 @@
/ {
aliases {
dsi0 = &disp_dsi0;
ethernet0 = &eth;
i2c0 = &i2c0;
i2c1 = &i2c1;
@ -34,6 +35,15 @@ aliases {
serial0 = &uart0;
};
backlight_lcm1: backlight-lcm1 {
compatible = "pwm-backlight";
brightness-levels = <0 1023>;
default-brightness-level = <576>;
num-interpolated-steps = <1023>;
power-supply = <&reg_vsys>;
pwms = <&disp_pwm1 0 500000>;
};
chosen {
stdout-path = "serial0:921600n8";
};
@ -227,6 +237,28 @@ usb_p2_vbus: regulator-9 {
regulator-max-microvolt = <5000000>;
enable-active-high;
};
lcm1_iovcc: regulator-vio18-lcm1 {
compatible = "regulator-fixed";
regulator-name = "vio18_lcm1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
gpio = <&pio 111 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&dsi0_vreg_en_pins>;
vin-supply = <&reg_vsys>;
};
lcm1_vddp: regulator-vsys-lcm1 {
compatible = "regulator-fixed";
regulator-name = "vsys_lcm1";
regulator-min-microvolt = <4200000>;
regulator-max-microvolt = <4200000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vsys>;
};
};
&adsp {
@ -239,6 +271,67 @@ &afe {
status = "okay";
};
&disp_dsi0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {
compatible = "startek,kd070fhfid078", "himax,hx8279";
reg = <0>;
backlight = <&backlight_lcm1>;
enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
reset-gpios = <&pio 25 GPIO_ACTIVE_HIGH>;
iovcc-supply = <&lcm1_iovcc>;
vdd-supply = <&lcm1_vddp>;
pinctrl-names = "default";
pinctrl-0 = <&panel_default_pins>;
port {
dsi_panel_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi0_in: endpoint {
remote-endpoint = <&dither0_out>;
};
};
port@1 {
reg = <1>;
dsi0_out: endpoint {
remote-endpoint = <&dsi_panel_in>;
};
};
};
};
&disp_pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&disp_pwm1_pins>;
status = "okay";
};
&dither0_in {
remote-endpoint = <&postmask0_out>;
};
&dither0_out {
remote-endpoint = <&dsi0_in>;
};
&gamma0_out {
remote-endpoint = <&postmask0_in>;
};
&gpu {
mali-supply = <&mt6359_vproc2_buck_reg>;
status = "okay";
@ -390,6 +483,10 @@ &mfg1 {
domain-supply = <&mt6359_vsram_others_ldo_reg>;
};
&mipi_tx_config0 {
status = "okay";
};
&mmc0 {
status = "okay";
pinctrl-names = "default", "state_uhs";
@ -499,6 +596,10 @@ &mt6359codec {
mediatek,mic-type-1 = <3>; /* DCC */
};
&ovl0_in {
remote-endpoint = <&vdosys0_ep_main>;
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_default_pins>;
@ -537,6 +638,12 @@ pins-cmd-dat {
};
};
disp_pwm1_pins: disp-pwm1-pins {
pins-pwm {
pinmux = <PINMUX_GPIO30__FUNC_O_DISP_PWM1>;
};
};
dptx_pins: dptx-pins {
pins-cmd-dat {
pinmux = <PINMUX_GPIO46__FUNC_I0_DP_TX_HPD>;
@ -857,21 +964,23 @@ pins-dat1 {
};
};
dsi0_vreg_en_pins: dsi0-vreg-en-pins {
pins-pwr-en {
pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>;
output-low;
};
};
panel_default_pins: panel-default-pins {
pins-dcdc {
pinmux = <PINMUX_GPIO45__FUNC_B_GPIO45>;
pins-rst {
pinmux = <PINMUX_GPIO25__FUNC_B_GPIO25>;
output-low;
};
pins-en {
pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>;
pinmux = <PINMUX_GPIO45__FUNC_B_GPIO45>;
output-low;
};
pins-rst {
pinmux = <PINMUX_GPIO25__FUNC_B_GPIO25>;
output-high;
};
};
pcie_default_pins: pcie-default-pins {
@ -1055,6 +1164,14 @@ power-key {
};
};
&postmask0_in {
remote-endpoint = <&gamma0_out>;
};
&postmask0_out {
remote-endpoint = <&dither0_in>;
};
&scp_cluster {
status = "okay";
};
@ -1124,6 +1241,18 @@ &uart2 {
status = "okay";
};
&vdosys0 {
port {
#address-cells = <1>;
#size-cells = <0>;
vdosys0_ep_main: endpoint@0 {
reg = <0>;
remote-endpoint = <&ovl0_in>;
};
};
};
&u3phy0 {
status = "okay";
};