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AT91 DT for 6.2

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It contains:
 - interrupt support for ethernet PHYs on pcb8290 board
 - thermal management support for SAMA7G5 by adding OTP controller
   (that keeps temperature sensor calibration data), proper ADC
   bindings and describing thermal zones
 - securam node from SAMA7G5 is now described with generic name (sram)
 - remove of status = "okay" from SAM9X60-EK regulators
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Merge tag 'at91-dt-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

AT91 DT for 6.2

It contains:
- interrupt support for ethernet PHYs on pcb8290 board
- thermal management support for SAMA7G5 by adding OTP controller
  (that keeps temperature sensor calibration data), proper ADC
  bindings and describing thermal zones
- securam node from SAMA7G5 is now described with generic name (sram)
- remove of status = "okay" from SAM9X60-EK regulators

* tag 'at91-dt-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sam9x60ek: remove status = "okay" for regulators
  ARM: dts: at91: sama7g5: use generic name for securam
  ARM: dts: at91: sama7g5: add thermal zones node
  ARM: dts: at91: sama7g5: add temperature sensor
  ARM: dts: at91: sama7g5: add cells for temperature calibration
  ARM: dts: at91: sama7g5: add io-channel-cells to adc node
  ARM: dts: at91: sama7g5: add otpc node
  ARM: dts: lan966x: Add interrupt support for PHYs on pcb8290

Link: https://lore.kernel.org/r/20221110115431.180908-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-11-14 15:34:40 +01:00
commit 6ef881e446
3 changed files with 82 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/at91-sam9x60ek.dts
View File

@ -76,7 +76,6 @@ vdd_1v8: fixed-regulator-vdd_1v8 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
status = "okay";
};
vdd_1v15: fixed-regulator-vdd_1v15 {
@ -85,7 +84,6 @@ vdd_1v15: fixed-regulator-vdd_1v15 {
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
status = "okay";
};
vdd1_3v3: fixed-regulator-vdd1_3v3 {
@ -94,7 +92,6 @@ vdd1_3v3: fixed-regulator-vdd1_3v3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
status = "okay";
};
vdd2_3v3: regulator-fixed-vdd2_3v3 {
@ -103,7 +100,6 @@ vdd2_3v3: regulator-fixed-vdd2_3v3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
status = "okay";
};
};

16
arch/arm/boot/dts/lan966x-pcb8290.dts
View File

@ -58,41 +58,57 @@ &mdio0 {
ext_phy0: ethernet-phy@7 {
reg = <7>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
};
ext_phy1: ethernet-phy@8 {
reg = <8>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
};
ext_phy2: ethernet-phy@9 {
reg = <9>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
};
ext_phy3: ethernet-phy@10 {
reg = <10>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
};
ext_phy4: ethernet-phy@15 {
reg = <15>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
};
ext_phy5: ethernet-phy@16 {
reg = <16>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
};
ext_phy6: ethernet-phy@17 {
reg = <17>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
};
ext_phy7: ethernet-phy@18 {
reg = <18>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
};
};

67
arch/arm/boot/dts/sama7g5.dtsi
View File

@ -9,12 +9,15 @@
*
*/
#include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mfd/at91-usart.h>
#include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
#include <dt-bindings/thermal/thermal.h>
/ {
model = "Microchip SAMA7G5 family SoC";
@ -34,6 +37,7 @@ cpu0: cpu@0 {
clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>; /* min followed by max */
};
};
@ -72,6 +76,46 @@ opp-1000000002 {
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&thermal_sensor>;
trips {
cpu_normal: cpu-alert0 {
temperature = <90000>;
hysteresis = <0>;
type = "passive";
};
cpu_hot: cpu-alert1 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
cpu_critical: cpu-critical {
temperature = <100000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_normal>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
clocks {
slow_xtal: slow_xtal {
compatible = "fixed-clock";
@ -108,6 +152,13 @@ ns_sram: sram@100000 {
ranges;
};
thermal_sensor: thermal-sensor {
compatible = "generic-adc-thermal";
#thermal-sensor-cells = <0>;
io-channels = <&adc AT91_SAMA7G5_ADC_TEMP_CHANNEL>;
io-channel-names = "sensor-channel";
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
@ -153,7 +204,7 @@ nand_controller: nand-controller {
};
};
securam: securam@e0000000 {
securam: sram@e0000000 {
compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
reg = <0xe0000000 0x4000>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
@ -420,6 +471,9 @@ adc: adc@e1000000 {
atmel,min-sample-rate-hz = <200000>;
atmel,max-sample-rate-hz = <20000000>;
atmel,startup-time-ms = <4>;
#io-channel-cells = <1>;
nvmem-cells = <&temperature_calib>;
nvmem-cell-names = "temperature_calib";
status = "disabled";
};
@ -888,6 +942,17 @@ ddr3phy: ddr3phy@e3804000 {
reg = <0xe3804000 0x1000>;
};
otpc: efuse@e8c00000 {
compatible = "microchip,sama7g5-otpc", "syscon";
reg = <0xe8c00000 0x100>;
#address-cells = <1>;
#size-cells = <1>;
temperature_calib: calib@1 {
reg = <OTP_PKT(1) 76>;
};
};
gic: interrupt-controller@e8c11000 {
compatible = "arm,cortex-a7-gic";
#interrupt-cells = <3>;