From a16b72612bb98a3ef6546bf52569643ddba0104f Mon Sep 17 00:00:00 2001 From: Horatiu Vultur Date: Thu, 15 Sep 2022 08:41:12 +0200 Subject: [PATCH 1/8] ARM: dts: lan966x: Add interrupt support for PHYs on pcb8290 Add interrupt support for the PHYs found on pcb8290. They are all sharing the same interrupt line towards lan966x. Signed-off-by: Horatiu Vultur Acked-by: Nicolas Ferre Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220915064112.1935051-1-horatiu.vultur@microchip.com --- arch/arm/boot/dts/lan966x-pcb8290.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/lan966x-pcb8290.dts b/arch/arm/boot/dts/lan966x-pcb8290.dts index 77187f59f04d..8804e8ba5370 100644 --- a/arch/arm/boot/dts/lan966x-pcb8290.dts +++ b/arch/arm/boot/dts/lan966x-pcb8290.dts @@ -58,41 +58,57 @@ &mdio0 { ext_phy0: ethernet-phy@7 { reg = <7>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio>; coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; }; ext_phy1: ethernet-phy@8 { reg = <8>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio>; coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; }; ext_phy2: ethernet-phy@9 { reg = <9>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio>; coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; }; ext_phy3: ethernet-phy@10 { reg = <10>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio>; coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; }; ext_phy4: ethernet-phy@15 { reg = <15>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio>; coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; }; ext_phy5: ethernet-phy@16 { reg = <16>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio>; coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; }; ext_phy6: ethernet-phy@17 { reg = <17>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio>; coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; }; ext_phy7: ethernet-phy@18 { reg = <18>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio>; coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>; }; }; From c01657dbcde8bf1c2cfdba61cc9ca0427ede145e Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 26 Oct 2022 15:41:05 +0300 Subject: [PATCH 2/8] ARM: dts: at91: sama7g5: add otpc node Add OTPC node along with temperature calibration cell. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20221026124114.985876-3-claudiu.beznea@microchip.com --- arch/arm/boot/dts/sama7g5.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index 7bd8ae8e8d38..b15435674e1a 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -15,6 +15,7 @@ #include #include #include +#include / { model = "Microchip SAMA7G5 family SoC"; @@ -888,6 +889,17 @@ ddr3phy: ddr3phy@e3804000 { reg = <0xe3804000 0x1000>; }; + otpc: efuse@e8c00000 { + compatible = "microchip,sama7g5-otpc", "syscon"; + reg = <0xe8c00000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + + temperature_calib: calib@1 { + reg = ; + }; + }; + gic: interrupt-controller@e8c11000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; From 52d9b4fee7fa9f9164c304badde9733d8f6cb707 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 26 Oct 2022 15:41:06 +0300 Subject: [PATCH 3/8] ARM: dts: at91: sama7g5: add io-channel-cells to adc node Add io-channel-cell to ADC node. It is necessary for DT users of ADC. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20221026124114.985876-4-claudiu.beznea@microchip.com --- arch/arm/boot/dts/sama7g5.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index b15435674e1a..d80aaa13c9cd 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -421,6 +421,7 @@ adc: adc@e1000000 { atmel,min-sample-rate-hz = <200000>; atmel,max-sample-rate-hz = <20000000>; atmel,startup-time-ms = <4>; + #io-channel-cells = <1>; status = "disabled"; }; From f90b33a57410668302d7a5d8785a9cb1cb9c567b Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 26 Oct 2022 15:41:07 +0300 Subject: [PATCH 4/8] ARM: dts: at91: sama7g5: add cells for temperature calibration Add NVMEM cell to ADC for temperature calibration data. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20221026124114.985876-5-claudiu.beznea@microchip.com --- arch/arm/boot/dts/sama7g5.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index d80aaa13c9cd..30fde2ae4e9d 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -422,6 +422,8 @@ adc: adc@e1000000 { atmel,max-sample-rate-hz = <20000000>; atmel,startup-time-ms = <4>; #io-channel-cells = <1>; + nvmem-cells = <&temperature_calib>; + nvmem-cell-names = "temperature_calib"; status = "disabled"; }; From 65d8815281d03b304af60b0ff2289eac5d1e0370 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 26 Oct 2022 15:41:08 +0300 Subject: [PATCH 5/8] ARM: dts: at91: sama7g5: add temperature sensor Add temperature sensor node. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20221026124114.985876-6-claudiu.beznea@microchip.com --- arch/arm/boot/dts/sama7g5.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index 30fde2ae4e9d..db5909403792 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -9,6 +9,7 @@ * */ +#include #include #include #include @@ -109,6 +110,13 @@ ns_sram: sram@100000 { ranges; }; + thermal_sensor: thermal-sensor { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&adc AT91_SAMA7G5_ADC_TEMP_CHANNEL>; + io-channel-names = "sensor-channel"; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; From 12045a7a0768c65ab4cebc2f0c8afd207fc4bc47 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 26 Oct 2022 15:41:09 +0300 Subject: [PATCH 6/8] ARM: dts: at91: sama7g5: add thermal zones node Add thermal zones node with its associated trips and cooling-maps. It uses CPUFreq as cooling device for temperatures in the interval [90, 100) degrees Celsius and describe the temperature of 100 degrees Celsius as critical temperature. System will be is shutting down when reaching critical temperature. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20221026124114.985876-7-claudiu.beznea@microchip.com --- arch/arm/boot/dts/sama7g5.dtsi | 42 ++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index db5909403792..4c736db0cc7e 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -17,6 +17,7 @@ #include #include #include +#include / { model = "Microchip SAMA7G5 family SoC"; @@ -36,6 +37,7 @@ cpu0: cpu@0 { clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>; clock-names = "cpu"; operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; /* min followed by max */ }; }; @@ -74,6 +76,46 @@ opp-1000000002 { }; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&thermal_sensor>; + + trips { + cpu_normal: cpu-alert0 { + temperature = <90000>; + hysteresis = <0>; + type = "passive"; + }; + + cpu_hot: cpu-alert1 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + cpu_critical: cpu-critical { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_normal>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map1 { + trip = <&cpu_hot>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + clocks { slow_xtal: slow_xtal { compatible = "fixed-clock"; From bc30e7d5f1afdd53e055bcbbb3eaba802f88c3c1 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 26 Oct 2022 15:41:13 +0300 Subject: [PATCH 7/8] ARM: dts: at91: sama7g5: use generic name for securam Use generic sram name for securam. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20221026124114.985876-11-claudiu.beznea@microchip.com --- arch/arm/boot/dts/sama7g5.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index 4c736db0cc7e..ab131762ecb5 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -204,7 +204,7 @@ nand_controller: nand-controller { }; }; - securam: securam@e0000000 { + securam: sram@e0000000 { compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram"; reg = <0xe0000000 0x4000>; clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; From 5258d30f33bdbb495f6de7601db5d60e13223a5b Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 26 Oct 2022 15:41:14 +0300 Subject: [PATCH 8/8] ARM: dts: at91: sam9x60ek: remove status = "okay" for regulators Remove status = "okay" for sam9x60ek regulator as okay is the default status. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20221026124114.985876-12-claudiu.beznea@microchip.com --- arch/arm/boot/dts/at91-sam9x60ek.dts | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts index 4ba52ba11dc6..d929c1ba5789 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -76,7 +76,6 @@ vdd_1v8: fixed-regulator-vdd_1v8 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; - status = "okay"; }; vdd_1v15: fixed-regulator-vdd_1v15 { @@ -85,7 +84,6 @@ vdd_1v15: fixed-regulator-vdd_1v15 { regulator-min-microvolt = <1150000>; regulator-max-microvolt = <1150000>; regulator-always-on; - status = "okay"; }; vdd1_3v3: fixed-regulator-vdd1_3v3 { @@ -94,7 +92,6 @@ vdd1_3v3: fixed-regulator-vdd1_3v3 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; - status = "okay"; }; vdd2_3v3: regulator-fixed-vdd2_3v3 { @@ -103,7 +100,6 @@ vdd2_3v3: regulator-fixed-vdd2_3v3 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; - status = "okay"; }; };