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net/mlx5: Add silent mode set/query and VHCA RX IFC bits
Update the mlx5 IFC headers with newly defined capability and command-layout bits: - Add silent_mode_query and rename silent_mode to silent_mode_set cap fields. - Add forward_vhca_rx and MLX5_IFC_FLOW_DESTINATION_TYPE_VHCA_RX. - Expose silent mode fields in the L2 table query command structures. Update the SD support check to use the new capability name (silent_mode_set) to match the updated IFC definition. Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20260309093435.1850724-3-tariqt@nvidia.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
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@ -1183,7 +1183,7 @@ int mlx5_fs_cmd_set_l2table_entry_silent(struct mlx5_core_dev *dev, u8 silent_mo
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{
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u32 in[MLX5_ST_SZ_DW(set_l2_table_entry_in)] = {};
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if (silent_mode && !MLX5_CAP_GEN(dev, silent_mode))
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if (silent_mode && !MLX5_CAP_GEN(dev, silent_mode_set))
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return -EOPNOTSUPP;
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MLX5_SET(set_l2_table_entry_in, in, opcode, MLX5_CMD_OP_SET_L2_TABLE_ENTRY);
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@ -107,7 +107,7 @@ static bool mlx5_sd_is_supported(struct mlx5_core_dev *dev, u8 host_buses)
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/* Disconnect secondaries from the network */
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if (!MLX5_CAP_GEN(dev, eswitch_manager))
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return false;
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if (!MLX5_CAP_GEN(dev, silent_mode))
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if (!MLX5_CAP_GEN(dev, silent_mode_set))
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return false;
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/* RX steering from primary to secondaries */
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@ -469,7 +469,8 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
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u8 table_miss_action_domain[0x1];
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u8 termination_table[0x1];
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u8 reformat_and_fwd_to_table[0x1];
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u8 reserved_at_1a[0x2];
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u8 forward_vhca_rx[0x1];
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u8 reserved_at_1b[0x1];
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u8 ipsec_encrypt[0x1];
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u8 ipsec_decrypt[0x1];
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u8 sw_owner_v2[0x1];
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@ -2012,12 +2013,14 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 disable_local_lb_mc[0x1];
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u8 log_min_hairpin_wq_data_sz[0x5];
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u8 reserved_at_3e8[0x1];
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u8 silent_mode[0x1];
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u8 silent_mode_set[0x1];
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u8 vhca_state[0x1];
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u8 log_max_vlan_list[0x5];
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u8 reserved_at_3f0[0x3];
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u8 log_max_current_mc_list[0x5];
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u8 reserved_at_3f8[0x3];
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u8 reserved_at_3f8[0x1];
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u8 silent_mode_query[0x1];
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u8 reserved_at_3fa[0x1];
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u8 log_max_current_uc_list[0x5];
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u8 general_obj_types[0x40];
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@ -2279,6 +2282,7 @@ enum mlx5_ifc_flow_destination_type {
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MLX5_IFC_FLOW_DESTINATION_TYPE_VPORT = 0x0,
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MLX5_IFC_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
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MLX5_IFC_FLOW_DESTINATION_TYPE_TIR = 0x2,
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MLX5_IFC_FLOW_DESTINATION_TYPE_VHCA_RX = 0x4,
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MLX5_IFC_FLOW_DESTINATION_TYPE_FLOW_SAMPLER = 0x6,
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MLX5_IFC_FLOW_DESTINATION_TYPE_UPLINK = 0x8,
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MLX5_IFC_FLOW_DESTINATION_TYPE_TABLE_TYPE = 0xA,
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@ -6265,7 +6269,9 @@ struct mlx5_ifc_query_l2_table_entry_out_bits {
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u8 reserved_at_40[0xa0];
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u8 reserved_at_e0[0x13];
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u8 reserved_at_e0[0x11];
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u8 silent_mode[0x1];
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u8 reserved_at_f2[0x1];
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u8 vlan_valid[0x1];
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u8 vlan[0xc];
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@ -6281,7 +6287,10 @@ struct mlx5_ifc_query_l2_table_entry_in_bits {
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u8 reserved_at_20[0x10];
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u8 op_mod[0x10];
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u8 reserved_at_40[0x60];
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u8 reserved_at_40[0x40];
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u8 silent_mode_query[0x1];
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u8 reserved_at_81[0x1f];
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u8 reserved_at_a0[0x8];
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u8 table_index[0x18];
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