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arm64: dts: rockchip: Add power controller for RK3528

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Add power-domain nodes for the power controller on RK3528.

Only PD_GPU can fully be powered down. PD_RKVDEC, PD_RKVENC, PD_VO and
PD_VPU are idle only power domains used by miscellaneous devices.

Because multiple of the miscellaneous device types currently complain
about the use of a power-domains prop, only PD_GPU is enabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250518220707.669515-5-jonas@kwiboo.se
[changed to using numeric values, until the next merge-window]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Jonas Karlman 2025-05-18 22:06:51 +00:00 committed by Heiko Stuebner
parent 64df8e2e20
commit 654df8e74d
1 changed files with 64 additions and 0 deletions
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64
arch/arm64/boot/dts/rockchip/rk3528.dtsi
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@ -439,6 +439,70 @@ ioc_grf: syscon@ff540000 {
reg = <0x0 0xff540000 0x0 0x40000>;
};
pmu: power-management@ff600000 {
compatible = "rockchip,rk3528-pmu", "syscon", "simple-mfd";
reg = <0x0 0xff600000 0x0 0x2000>;
power: power-controller {
compatible = "rockchip,rk3528-power-controller";
#power-domain-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
/* These power domains are grouped by VD_GPU */
power-domain@4 {
reg = <4>;
clocks = <&cru ACLK_GPU_MALI>,
<&cru PCLK_GPU_ROOT>;
pm_qos = <&qos_gpu_m0>,
<&qos_gpu_m1>;
#power-domain-cells = <0>;
};
/* These power domains are grouped by VD_LOGIC */
power-domain@5 {
reg = <5>;
pm_qos = <&qos_rkvdec>;
#power-domain-cells = <0>;
status = "disabled";
};
power-domain@6 {
reg = <6>;
pm_qos = <&qos_rkvenc>;
#power-domain-cells = <0>;
status = "disabled";
};
power-domain@7 {
reg = <7>;
pm_qos = <&qos_gmac0>,
<&qos_hdcp>,
<&qos_jpegdec>,
<&qos_rga2_m0ro>,
<&qos_rga2_m0wo>,
<&qos_sdmmc0>,
<&qos_usb2host>,
<&qos_vdpp>,
<&qos_vop>;
#power-domain-cells = <0>;
status = "disabled";
};
power-domain@8 {
reg = <8>;
pm_qos = <&qos_emmc>,
<&qos_fspi>,
<&qos_gmac1>,
<&qos_pcie>,
<&qos_sdio0>,
<&qos_sdio1>,
<&qos_tsp>,
<&qos_usb3otg>,
<&qos_vpu>;
#power-domain-cells = <0>;
status = "disabled";
};
};
};
spi0: spi@ff9c0000 {
compatible = "rockchip,rk3528-spi",
"rockchip,rk3066-spi";