github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-05 04:56:13 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: rockchip: enable USB on Sige5

Browse Source 
The ArmSoM Sige5 has several USB ports: a Type-A USB 3 port (USB2 lines
going through a hub), a Type-A USB 2.0 port (also going through a hub),
a Type-C DC input port that has absolutely no USB data connection and a
Type-C port with USB3.2 Gen1x1 that's also the maskrom programming port.

Enable these ports, and set the device role to be host for the host
ports.

The data capable Type-C USB port uses a fusb302 for data role switching.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250619-rk3576-sige5-usb-v5-2-9069a7e750e1@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Nicolas Frattaroli 2025-06-19 20:36:37 +02:00 committed by Heiko Stuebner
parent a8cdcbe6a9
commit 64df8e2e20
1 changed files with 161 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

161
arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
View File

@ -196,6 +196,30 @@ vcc_5v0_device: regulator-vcc-5v0-device {
vin-supply = <&vcc_12v0_dcin>;
};
vcc_5v0_typec0: regulator-vcc-5v0-typec0 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_otg0_pwren>;
regulator-name = "vcc_5v0_typec0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc_5v0_device>;
};
vcc_5v0_usbhost: regulator-vcc-5v0-usbhost {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_host_pwren>;
regulator-name = "vcc_5v0_usbhost";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc_5v0_device>;
};
vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_ufs_s0";
@ -216,6 +240,10 @@ sdio_pwrseq: sdio-pwrseq {
};
};
&combphy1_psu {
status = "okay";
};
&combphy0_ps {
status = "okay";
};
@ -640,6 +668,58 @@ regulator-state-mem {
&i2c2 {
status = "okay";
usbc0: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_interrupt>;
vbus-supply = <&vcc_5v0_typec0>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
/* fusb302 supports PD Rev 2.0 Ver 1.2 */
pd-revision = /bits/ 8 <0x2 0x0 0x1 0x2>;
power-role = "source";
source-pdos = <PDO_FIXED(5000, 2000,
PDO_FIXED_USB_COMM | PDO_FIXED_DATA_SWAP)>;
altmodes {
displayport {
svid = /bits/ 16 <0xff01>;
vdo = <0xffffffff>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_hs_ep: endpoint {
remote-endpoint = <&usb_drd0_hs_ep>;
};
};
port@1 {
reg = <1>;
usbc0_ss_ep: endpoint {
remote-endpoint = <&usb_drd0_ss_ep>;
};
};
port@2 {
reg = <2>;
usbc0_dp_ep: endpoint {
remote-endpoint = <&usbdp_phy_ep>;
};
};
};
};
};
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
@ -746,6 +826,24 @@ pcie_reset: pcie-reset {
};
};
usb {
usb_host_pwren: usb-host-pwren {
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb_otg0_pwren: usb-otg0-pwren {
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbc0_interrupt: usbc0-interrupt {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
usbc0_sbu1: usbc0-sbu1 {
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>;
};
usbc0_sbu2: usbc0-sbu2 {
rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
bt_reg_on: bt-reg-on {
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
@ -827,6 +925,23 @@ &sdmmc {
status = "okay";
};
&u2phy0 {
status = "okay";
};
&u2phy0_otg {
status = "okay";
};
&u2phy1 {
status = "okay";
};
&u2phy1_otg {
phy-supply = <&vcc_5v0_usbhost>;
status = "okay";
};
&uart0 {
pinctrl-0 = <&uart0m0_xfer>;
status = "okay";
@ -839,6 +954,52 @@ &uart4 {
uart-has-rtscts;
};
&usb_drd0_dwc3 {
usb-role-switch;
dr_mode = "otg";
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_drd0_hs_ep: endpoint {
remote-endpoint = <&usbc0_hs_ep>;
};
};
port@1 {
reg = <1>;
usb_drd0_ss_ep: endpoint {
remote-endpoint = <&usbc0_ss_ep>;
};
};
};
};
&usb_drd1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usbdp_phy {
mode-switch;
orientation-switch;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_sbu1 &usbc0_sbu2>;
sbu1-dc-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>;
sbu2-dc-gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_HIGH>;
status = "okay";
port {
usbdp_phy_ep: endpoint {
remote-endpoint = <&usbc0_dp_ep>;
};
};
};
&vop {
status = "okay";
};