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drm/amd/display: Drop struct crc_region and reuse struct rect

Browse Source 
[Why]
reuse struct rect rather than adding a new struct.

[How]
- Userspace keeps inputting x_start, y_start, x_end, y_end
- We translate data to x, y, width, height in code flow to store
- translate back to x_start, y_start, x_end, y_end before programming HW

Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alan Liu 2022-10-20 11:46:43 -04:00 committed by Alex Deucher
parent c0459bddd1
commit 62fa035b56
8 changed files with 46 additions and 42 deletions
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20
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
View File

@ -89,10 +89,10 @@ static void amdgpu_dm_set_crc_window_default(struct drm_crtc *crtc)
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
spin_lock_irq(&drm_dev->event_lock);
acrtc->dm_irq_params.window_param.roi.x_start = 0;
acrtc->dm_irq_params.window_param.roi.y_start = 0;
acrtc->dm_irq_params.window_param.roi.x_end = 0;
acrtc->dm_irq_params.window_param.roi.y_end = 0;
acrtc->dm_irq_params.window_param.x_start = 0;
acrtc->dm_irq_params.window_param.y_start = 0;
acrtc->dm_irq_params.window_param.x_end = 0;
acrtc->dm_irq_params.window_param.y_end = 0;
acrtc->dm_irq_params.window_param.activated = false;
acrtc->dm_irq_params.window_param.update_win = false;
acrtc->dm_irq_params.window_param.skip_frame_cnt = 0;
@ -145,7 +145,7 @@ amdgpu_dm_forward_crc_window(struct work_struct *work)
dm = crc_fw_wrk->dm;
mutex_lock(&dm->dc_lock);
dc_stream_forward_crc_window(dm->dc, &crc_fw_wrk->roi, crc_fw_wrk->stream, crc_fw_wrk->is_stop_cmd);
dc_stream_forward_crc_window(dm->dc, &crc_fw_wrk->rect, crc_fw_wrk->stream, crc_fw_wrk->is_stop_cmd);
mutex_unlock(&dm->dc_lock);
kfree(crc_fw_wrk);
@ -496,10 +496,12 @@ void amdgpu_dm_crtc_handle_crc_window_irq(struct drm_crtc *crtc)
INIT_WORK(&crc_fw_wrk->forward_roi_work, amdgpu_dm_forward_crc_window);
crc_fw_wrk->dm = &adev->dm;
crc_fw_wrk->stream = stream_state;
crc_fw_wrk->roi.x_start = acrtc->dm_irq_params.window_param.roi.x_start;
crc_fw_wrk->roi.y_start = acrtc->dm_irq_params.window_param.roi.y_start;
crc_fw_wrk->roi.x_end = acrtc->dm_irq_params.window_param.roi.x_end;
crc_fw_wrk->roi.y_end = acrtc->dm_irq_params.window_param.roi.y_end;
crc_fw_wrk->rect.x = acrtc->dm_irq_params.window_param.x_start;
crc_fw_wrk->rect.y = acrtc->dm_irq_params.window_param.y_start;
crc_fw_wrk->rect.width = acrtc->dm_irq_params.window_param.x_end -
acrtc->dm_irq_params.window_param.x_start;
crc_fw_wrk->rect.height = acrtc->dm_irq_params.window_param.y_end -
acrtc->dm_irq_params.window_param.y_start;
schedule_work(&crc_fw_wrk->forward_roi_work);
acrtc->dm_irq_params.window_param.update_win = false;

7
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h
View File

@ -41,7 +41,10 @@ enum amdgpu_dm_pipe_crc_source {
#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
struct crc_window_param {
struct crc_region roi;
uint16_t x_start;
uint16_t y_start;
uint16_t x_end;
uint16_t y_end;
/* CRC windwo is activated or not*/
bool activated;
/* Update crc window during vertical blank or not */
@ -64,7 +67,7 @@ struct crc_fw_work {
struct work_struct forward_roi_work;
struct amdgpu_display_manager *dm;
struct dc_stream_state *stream;
struct crc_region roi;
struct rect rect;
bool is_stop_cmd;
};
#endif

16
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
View File

@ -3085,7 +3085,7 @@ static int crc_win_x_start_set(void *data, u64 val)
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
spin_lock_irq(&drm_dev->event_lock);
acrtc->dm_irq_params.window_param.roi.x_start = (uint16_t) val;
acrtc->dm_irq_params.window_param.x_start = (uint16_t) val;
acrtc->dm_irq_params.window_param.update_win = false;
spin_unlock_irq(&drm_dev->event_lock);
@ -3102,7 +3102,7 @@ static int crc_win_x_start_get(void *data, u64 *val)
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
spin_lock_irq(&drm_dev->event_lock);
*val = acrtc->dm_irq_params.window_param.roi.x_start;
*val = acrtc->dm_irq_params.window_param.x_start;
spin_unlock_irq(&drm_dev->event_lock);
return 0;
@ -3122,7 +3122,7 @@ static int crc_win_y_start_set(void *data, u64 val)
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
spin_lock_irq(&drm_dev->event_lock);
acrtc->dm_irq_params.window_param.roi.y_start = (uint16_t) val;
acrtc->dm_irq_params.window_param.y_start = (uint16_t) val;
acrtc->dm_irq_params.window_param.update_win = false;
spin_unlock_irq(&drm_dev->event_lock);
@ -3139,7 +3139,7 @@ static int crc_win_y_start_get(void *data, u64 *val)
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
spin_lock_irq(&drm_dev->event_lock);
*val = acrtc->dm_irq_params.window_param.roi.y_start;
*val = acrtc->dm_irq_params.window_param.y_start;
spin_unlock_irq(&drm_dev->event_lock);
return 0;
@ -3158,7 +3158,7 @@ static int crc_win_x_end_set(void *data, u64 val)
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
spin_lock_irq(&drm_dev->event_lock);
acrtc->dm_irq_params.window_param.roi.x_end = (uint16_t) val;
acrtc->dm_irq_params.window_param.x_end = (uint16_t) val;
acrtc->dm_irq_params.window_param.update_win = false;
spin_unlock_irq(&drm_dev->event_lock);
@ -3175,7 +3175,7 @@ static int crc_win_x_end_get(void *data, u64 *val)
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
spin_lock_irq(&drm_dev->event_lock);
*val = acrtc->dm_irq_params.window_param.roi.x_end;
*val = acrtc->dm_irq_params.window_param.x_end;
spin_unlock_irq(&drm_dev->event_lock);
return 0;
@ -3194,7 +3194,7 @@ static int crc_win_y_end_set(void *data, u64 val)
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
spin_lock_irq(&drm_dev->event_lock);
acrtc->dm_irq_params.window_param.roi.y_end = (uint16_t) val;
acrtc->dm_irq_params.window_param.y_end = (uint16_t) val;
acrtc->dm_irq_params.window_param.update_win = false;
spin_unlock_irq(&drm_dev->event_lock);
@ -3211,7 +3211,7 @@ static int crc_win_y_end_get(void *data, u64 *val)
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
spin_lock_irq(&drm_dev->event_lock);
*val = acrtc->dm_irq_params.window_param.roi.y_end;
*val = acrtc->dm_irq_params.window_param.y_end;
spin_unlock_irq(&drm_dev->event_lock);
return 0;

20
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@ -493,7 +493,7 @@ bool dc_stream_get_crtc_position(struct dc *dc,
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
static inline void
dc_stream_forward_dmub_crc_window(struct dc_dmub_srv *dmub_srv,
struct crc_region *roi, struct otg_phy_mux *mux_mapping, bool is_stop)
struct rect *rect, struct otg_phy_mux *mux_mapping, bool is_stop)
{
union dmub_rb_cmd cmd = {0};
@ -506,10 +506,10 @@ dc_stream_forward_dmub_crc_window(struct dc_dmub_srv *dmub_srv,
} else {
cmd.secure_display.header.type = DMUB_CMD__SECURE_DISPLAY;
cmd.secure_display.header.sub_type = DMUB_CMD__SECURE_DISPLAY_CRC_WIN_NOTIFY;
cmd.secure_display.roi_info.x_start = roi->x_start;
cmd.secure_display.roi_info.y_start = roi->y_start;
cmd.secure_display.roi_info.x_end = roi->x_end;
cmd.secure_display.roi_info.y_end = roi->y_end;
cmd.secure_display.roi_info.x_start = rect->x;
cmd.secure_display.roi_info.y_start = rect->y;
cmd.secure_display.roi_info.x_end = rect->x + rect->width;
cmd.secure_display.roi_info.y_end = rect->y + rect->height;
}
dc_dmub_srv_cmd_queue(dmub_srv, &cmd);
@ -518,17 +518,17 @@ dc_stream_forward_dmub_crc_window(struct dc_dmub_srv *dmub_srv,
static inline void
dc_stream_forward_dmcu_crc_window(struct dmcu *dmcu,
struct crc_region *roi, struct otg_phy_mux *mux_mapping, bool is_stop)
struct rect *rect, struct otg_phy_mux *mux_mapping, bool is_stop)
{
if (is_stop)
dmcu->funcs->stop_crc_win_update(dmcu, mux_mapping);
else
dmcu->funcs->forward_crc_window(dmcu, roi, mux_mapping);
dmcu->funcs->forward_crc_window(dmcu, rect, mux_mapping);
}
bool
dc_stream_forward_crc_window(struct dc *dc,
struct crc_region *roi, struct dc_stream_state *stream, bool is_stop)
struct rect *rect, struct dc_stream_state *stream, bool is_stop)
{
struct dmcu *dmcu;
struct dc_dmub_srv *dmub_srv;
@ -554,10 +554,10 @@ dc_stream_forward_crc_window(struct dc *dc,
/* forward to dmub */
if (dmub_srv)
dc_stream_forward_dmub_crc_window(dmub_srv, roi, &mux_mapping, is_stop);
dc_stream_forward_dmub_crc_window(dmub_srv, rect, &mux_mapping, is_stop);
/* forward to dmcu */
else if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu))
dc_stream_forward_dmcu_crc_window(dmcu, roi, &mux_mapping, is_stop);
dc_stream_forward_dmcu_crc_window(dmcu, rect, &mux_mapping, is_stop);
else
return false;

2
drivers/gpu/drm/amd/display/dc/dc_stream.h
View File

@ -522,7 +522,7 @@ bool dc_stream_get_crtc_position(struct dc *dc,
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
bool dc_stream_forward_crc_window(struct dc *dc,
struct crc_region *roi,
struct rect *rect,
struct dc_stream_state *stream,
bool is_stop);
#endif

7
drivers/gpu/drm/amd/display/dc/dc_types.h
View File

@ -994,13 +994,6 @@ struct display_endpoint_id {
};
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
struct crc_region {
uint16_t x_start;
uint16_t y_start;
uint16_t x_end;
uint16_t y_end;
};
struct otg_phy_mux {
uint8_t phy_output_num;
uint8_t otg_output_num;

14
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
View File

@ -927,19 +927,20 @@ static bool dcn10_recv_edid_cea_ack(struct dmcu *dmcu, int *offset)
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
static void dcn10_forward_crc_window(struct dmcu *dmcu,
struct crc_region *crc_win,
struct rect *rect,
struct otg_phy_mux *mux_mapping)
{
struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);
unsigned int dmcu_max_retry_on_wait_reg_ready = 801;
unsigned int dmcu_wait_reg_ready_interval = 100;
unsigned int crc_start = 0, crc_end = 0, otg_phy_mux = 0;
int x_start, y_start, x_end, y_end;
/* If microcontroller is not running, do nothing */
if (dmcu->dmcu_state != DMCU_RUNNING)
return;
if (!crc_win)
if (!rect)
return;
/* waitDMCUReadyForCmd */
@ -947,9 +948,14 @@ static void dcn10_forward_crc_window(struct dmcu *dmcu,
dmcu_wait_reg_ready_interval,
dmcu_max_retry_on_wait_reg_ready);
x_start = rect->x;
y_start = rect->y;
x_end = x_start + rect->width;
y_end = y_start + rect->height;
/* build up nitification data */
crc_start = (((unsigned int) crc_win->x_start) << 16) | crc_win->y_start;
crc_end = (((unsigned int) crc_win->x_end) << 16) | crc_win->y_end;
crc_start = (((unsigned int) x_start) << 16) | y_start;
crc_end = (((unsigned int) x_end) << 16) | y_end;
otg_phy_mux =
(((unsigned int) mux_mapping->otg_output_num) << 16) | mux_mapping->phy_output_num;

2
drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h
View File

@ -86,7 +86,7 @@ struct dmcu_funcs {
bool (*recv_edid_cea_ack)(struct dmcu *dmcu, int *offset);
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
void (*forward_crc_window)(struct dmcu *dmcu,
struct crc_region *crc_win,
struct rect *rect,
struct otg_phy_mux *mux_mapping);
void (*stop_crc_win_update)(struct dmcu *dmcu,
struct otg_phy_mux *mux_mapping);