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drm/amd/pm: Setup driver pptable for smu 15.0.8
Setup driver pptable and initialize data from static metrics table for smu_v15_0_8 v2: Remove unrelated changes and update description (Lijo) v3: Use ARRAY_SIZE (Lijo) v4: Move structure to header file v5: squash in static metrics support (Asad) Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yang Wang
Alex Deucher
parent
fde815f76f
commit
611e5af419
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@ -690,6 +690,7 @@ enum amdgpu_uid_type {
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AMDGPU_UID_TYPE_XCD,
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AMDGPU_UID_TYPE_AID,
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AMDGPU_UID_TYPE_SOC,
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AMDGPU_UID_TYPE_MID,
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AMDGPU_UID_TYPE_MAX
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};
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@ -109,6 +109,7 @@ struct smu_15_0_dpm_context {
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uint32_t workload_policy_mask;
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uint32_t dcef_min_ds_clk;
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uint64_t caps;
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uint32_t board_volt;
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};
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enum smu_15_0_power_state {
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@ -35,6 +35,7 @@
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#include "mp/mp_15_0_8_offset.h"
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#include "mp/mp_15_0_8_sh_mask.h"
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#include "smu_v15_0.h"
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#include "amdgpu_fru_eeprom.h"
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#undef MP1_Public
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@ -51,6 +52,10 @@
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#undef pr_info
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#undef pr_debug
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#define SMUQ10_TO_UINT(x) ((x) >> 10)
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#define SMUQ10_FRAC(x) ((x) & 0x3ff)
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#define SMUQ10_ROUND(x) ((SMUQ10_TO_UINT(x)) + ((SMUQ10_FRAC(x)) >= 0x200))
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#define to_amdgpu_device(x) (container_of(x, struct amdgpu_device, pm.smu_i2c))
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#define SMU_15_0_8_FEA_MAP(smu_feature, smu_15_0_8_feature) \
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@ -161,6 +166,35 @@ static const struct cmn2asic_mapping smu_v15_0_8_table_map[SMU_TABLE_COUNT] = {
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static int smu_v15_0_8_tables_init(struct smu_context *smu)
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{
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struct smu_table_context *smu_table = &smu->smu_table;
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struct smu_table *tables = smu_table->tables;
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int gpu_metrcs_size = sizeof(MetricsTable_t);
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void *driver_pptable __free(kfree) = NULL;
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void *metrics_table __free(kfree) = NULL;
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SMU_TABLE_INIT(tables, SMU_TABLE_PMSTATUSLOG, SMU15_TOOL_SIZE,
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PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
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SMU_TABLE_INIT(tables, SMU_TABLE_SMU_METRICS,
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gpu_metrcs_size,
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PAGE_SIZE,
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AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT);
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metrics_table = kzalloc(gpu_metrcs_size, GFP_KERNEL);
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if (!metrics_table)
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return -ENOMEM;
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smu_table->metrics_time = 0;
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driver_pptable = kzalloc(sizeof(PPTable_t), GFP_KERNEL);
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if (!driver_pptable)
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return -ENOMEM;
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smu_table->metrics_table = no_free_ptr(metrics_table);
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smu_table->driver_pptable = no_free_ptr(driver_pptable);
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mutex_init(&smu_table->metrics_lock);
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return 0;
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}
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@ -197,6 +231,30 @@ static int smu_v15_0_8_init_smc_tables(struct smu_context *smu)
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return ret;
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}
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static int smu_v15_0_8_tables_fini(struct smu_context *smu)
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{
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struct smu_table_context *smu_table = &smu->smu_table;
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mutex_destroy(&smu_table->metrics_lock);
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return 0;
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}
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static int smu_v15_0_8_fini_smc_tables(struct smu_context *smu)
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{
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int ret;
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ret = smu_v15_0_8_tables_fini(smu);
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if (ret)
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return ret;
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ret = smu_v15_0_fini_smc_tables(smu);
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if (ret)
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return ret;
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return ret;
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}
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static int smu_v15_0_8_init_allowed_features(struct smu_context *smu)
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{
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/* pptable will handle the features to enable */
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@ -205,11 +263,6 @@ static int smu_v15_0_8_init_allowed_features(struct smu_context *smu)
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return 0;
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}
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static int smu_v15_0_8_set_default_dpm_table(struct smu_context *smu)
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{
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return 0;
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}
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static int smu_v15_0_8_setup_pptable(struct smu_context *smu)
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{
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struct smu_table_context *table_context = &smu->smu_table;
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@ -238,6 +291,173 @@ static int smu_v15_0_8_check_fw_status(struct smu_context *smu)
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return -EIO;
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}
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static int smu_v15_0_8_get_static_metrics_table(struct smu_context *smu)
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{
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struct smu_table_context *smu_table = &smu->smu_table;
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uint32_t table_size = smu_table->tables[SMU_TABLE_SMU_METRICS].size;
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struct smu_table *table = &smu_table->driver_table;
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int ret;
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ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetStaticMetricsTable, NULL);
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if (ret) {
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dev_err(smu->adev->dev,
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"Failed to export static metrics table!\n");
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return ret;
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}
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amdgpu_hdp_invalidate(smu->adev, NULL);
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memcpy(smu_table->metrics_table, table->cpu_addr, table_size);
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return 0;
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}
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static int smu_v15_0_8_fru_get_product_info(struct smu_context *smu,
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StaticMetricsTable_t *static_metrics)
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{
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struct amdgpu_fru_info *fru_info;
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struct amdgpu_device *adev = smu->adev;
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if (!adev->fru_info) {
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adev->fru_info = kzalloc(sizeof(*adev->fru_info), GFP_KERNEL);
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if (!adev->fru_info)
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return -ENOMEM;
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}
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fru_info = adev->fru_info;
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strscpy(fru_info->product_number, static_metrics->ProductInfo.ModelNumber,
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sizeof(fru_info->product_number));
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strscpy(fru_info->product_name, static_metrics->ProductInfo.Name,
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sizeof(fru_info->product_name));
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strscpy(fru_info->serial, static_metrics->ProductInfo.Serial,
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sizeof(fru_info->serial));
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strscpy(fru_info->manufacturer_name, static_metrics->ProductInfo.ManufacturerName,
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sizeof(fru_info->manufacturer_name));
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strscpy(fru_info->fru_id, static_metrics->ProductInfo.FruId,
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sizeof(fru_info->fru_id));
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return 0;
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}
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static void smu_v15_0_8_init_xgmi_data(struct smu_context *smu,
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StaticMetricsTable_t *static_metrics)
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{
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uint16_t max_speed;
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uint8_t max_width;
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max_width = (uint8_t)static_metrics->MaxXgmiWidth;
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max_speed = (uint16_t)static_metrics->MaxXgmiBitrate;
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amgpu_xgmi_set_max_speed_width(smu->adev, max_speed, max_width);
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}
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static int smu_v15_0_8_set_driver_pptable(struct smu_context *smu)
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{
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struct smu_15_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
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struct smu_table_context *smu_table = &smu->smu_table;
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StaticMetricsTable_t *static_metrics = (StaticMetricsTable_t *)smu_table->metrics_table;
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PPTable_t *pptable = (PPTable_t *)smu_table->driver_pptable;
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int ret, i, n;
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uint32_t table_version;
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if (!pptable->init) {
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ret = smu_v15_0_8_get_static_metrics_table(smu);
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if (ret)
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return ret;
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ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetMetricsVersion,
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&table_version);
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if (ret)
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return ret;
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smu_table->tables[SMU_TABLE_SMU_METRICS].version =
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table_version;
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pptable->MaxSocketPowerLimit =
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SMUQ10_ROUND(static_metrics->MaxSocketPowerLimit);
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pptable->MaxGfxclkFrequency =
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SMUQ10_ROUND(static_metrics->MaxGfxclkFrequency);
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pptable->MinGfxclkFrequency =
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SMUQ10_ROUND(static_metrics->MinGfxclkFrequency);
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pptable->MaxFclkFrequency =
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SMUQ10_ROUND(static_metrics->MaxFclkFrequency);
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pptable->MinFclkFrequency =
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SMUQ10_ROUND(static_metrics->MinFclkFrequency);
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pptable->MaxGl2clkFrequency =
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SMUQ10_ROUND(static_metrics->MaxGl2clkFrequency);
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pptable->MinGl2clkFrequency =
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SMUQ10_ROUND(static_metrics->MinGl2clkFrequency);
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for (i = 0; i < ARRAY_SIZE(static_metrics->UclkFrequencyTable); ++i)
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pptable->UclkFrequencyTable[i] =
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SMUQ10_ROUND(static_metrics->UclkFrequencyTable[i]);
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pptable->SocclkFrequency = SMUQ10_ROUND(static_metrics->SocclkFrequency);
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pptable->LclkFrequency = SMUQ10_ROUND(static_metrics->LclkFrequency);
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pptable->VclkFrequency = SMUQ10_ROUND(static_metrics->VclkFrequency);
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pptable->DclkFrequency = SMUQ10_ROUND(static_metrics->DclkFrequency);
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pptable->CTFLimitMID = SMUQ10_ROUND(static_metrics->CTFLimit_MID);
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pptable->CTFLimitAID = SMUQ10_ROUND(static_metrics->CTFLimit_AID);
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pptable->CTFLimitXCD = SMUQ10_ROUND(static_metrics->CTFLimit_XCD);
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pptable->CTFLimitHBM = SMUQ10_ROUND(static_metrics->CTFLimit_HBM);
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pptable->ThermalLimitMID = SMUQ10_ROUND(static_metrics->ThermalLimit_MID);
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pptable->ThermalLimitAID = SMUQ10_ROUND(static_metrics->ThermalLimit_AID);
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pptable->ThermalLimitXCD = SMUQ10_ROUND(static_metrics->ThermalLimit_XCD);
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pptable->ThermalLimitHBM = SMUQ10_ROUND(static_metrics->ThermalLimit_HBM);
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/* use MID0 serial number by default */
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pptable->PublicSerialNumberMID =
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static_metrics->PublicSerialNumber_MID[0];
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amdgpu_device_set_uid(smu->adev->uid_info, AMDGPU_UID_TYPE_SOC,
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0, pptable->PublicSerialNumberMID);
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pptable->PublicSerialNumberAID =
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static_metrics->PublicSerialNumber_AID[0];
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pptable->PublicSerialNumberXCD =
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static_metrics->PublicSerialNumber_XCD[0];
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n = ARRAY_SIZE(static_metrics->PublicSerialNumber_MID);
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for (i = 0; i < n; i++) {
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amdgpu_device_set_uid(smu->adev->uid_info, AMDGPU_UID_TYPE_MID, i,
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static_metrics->PublicSerialNumber_MID[i]);
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}
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n = ARRAY_SIZE(static_metrics->PublicSerialNumber_AID);
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for (i = 0; i < n; i++) {
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amdgpu_device_set_uid(smu->adev->uid_info, AMDGPU_UID_TYPE_AID, i,
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static_metrics->PublicSerialNumber_AID[i]);
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}
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n = ARRAY_SIZE(static_metrics->PublicSerialNumber_XCD);
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for (i = 0; i < n; i++) {
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amdgpu_device_set_uid(smu->adev->uid_info, AMDGPU_UID_TYPE_XCD, i,
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static_metrics->PublicSerialNumber_XCD[i]);
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}
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ret = smu_v15_0_8_fru_get_product_info(smu, static_metrics);
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if (ret)
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return ret;
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pptable->PPT1Max = static_metrics->PPT1Max;
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pptable->PPT1Min = static_metrics->PPT1Min;
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pptable->PPT1Default = static_metrics->PPT1Default;
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if (static_metrics->pldmVersion[0] != 0xFFFFFFFF)
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smu->adev->firmware.pldm_version =
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static_metrics->pldmVersion[0];
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dpm_context->board_volt = static_metrics->InputTelemetryVoltageInmV;
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smu_v15_0_8_init_xgmi_data(smu, static_metrics);
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pptable->init = true;
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}
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return 0;
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}
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static int smu_v15_0_8_set_default_dpm_table(struct smu_context *smu)
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{
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int ret;
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ret = smu_v15_0_8_set_driver_pptable(smu);
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if (ret)
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return ret;
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return 0;
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}
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static int smu_v15_0_8_irq_process(struct amdgpu_device *adev,
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struct amdgpu_irq_src *source,
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struct amdgpu_iv_entry *entry)
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@ -478,7 +698,7 @@ static const struct pptable_funcs smu_v15_0_8_ppt_funcs = {
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.set_default_dpm_table = smu_v15_0_8_set_default_dpm_table,
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.is_dpm_running = smu_v15_0_8_is_dpm_running,
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.init_smc_tables = smu_v15_0_8_init_smc_tables,
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.fini_smc_tables = smu_v15_0_fini_smc_tables,
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.fini_smc_tables = smu_v15_0_8_fini_smc_tables,
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.init_power = smu_v15_0_init_power,
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.fini_power = smu_v15_0_fini_power,
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.check_fw_status = smu_v15_0_8_check_fw_status,
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@ -25,4 +25,34 @@
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extern void smu_v15_0_8_set_ppt_funcs(struct smu_context *smu);
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typedef struct {
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uint32_t MaxSocketPowerLimit;
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uint32_t MaxGfxclkFrequency;
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uint32_t MinGfxclkFrequency;
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uint32_t MaxFclkFrequency;
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uint32_t MinFclkFrequency;
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uint32_t MaxGl2clkFrequency;
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uint32_t MinGl2clkFrequency;
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uint32_t UclkFrequencyTable[4];
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uint32_t SocclkFrequency;
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uint32_t LclkFrequency;
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uint32_t VclkFrequency;
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uint32_t DclkFrequency;
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uint32_t CTFLimitMID;
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uint32_t CTFLimitAID;
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uint32_t CTFLimitXCD;
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uint32_t CTFLimitHBM;
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uint32_t ThermalLimitMID;
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uint32_t ThermalLimitAID;
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uint32_t ThermalLimitXCD;
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uint32_t ThermalLimitHBM;
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uint64_t PublicSerialNumberMID;
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uint64_t PublicSerialNumberAID;
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uint64_t PublicSerialNumberXCD;
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uint32_t PPT1Max;
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uint32_t PPT1Min;
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uint32_t PPT1Default;
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bool init;
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} PPTable_t;
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#endif
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