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drm/amd/pm: Add mode2 support for smu_v15_0_8

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Add initial mode2 support for smu_v15_0_8

v2: Move out non smu code, remove pci save/restore logic (Lijo)
v3: squash in updated msg (Alex)

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Asad Kamal 2025-11-25 01:19:13 +08:00 committed by Alex Deucher
parent 2beedc3a92
commit fde815f76f
1 changed files with 44 additions and 0 deletions
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44
drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c
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@ -430,6 +430,49 @@ static bool smu_v15_0_8_is_dpm_running(struct smu_context *smu)
smu_v15_0_8_dpm_features.bits);
}
static int smu_v15_0_8_mode2_reset(struct smu_context *smu)
{
struct smu_msg_ctl *ctl = &smu->msg_ctl;
struct amdgpu_device *adev = smu->adev;
int timeout = 10;
int ret = 0;
mutex_lock(&ctl->lock);
ret = smu_msg_send_async_locked(ctl, SMU_MSG_GfxDeviceDriverReset,
SMU_RESET_MODE_2);
if (ret)
goto out;
/* Reset takes a bit longer, wait for 200ms. */
msleep(200);
dev_dbg(adev->dev, "wait for reset ack\n");
do {
ret = smu_msg_wait_response(ctl, 0);
/* Wait a bit more time for getting ACK */
if (ret == -ETIME) {
--timeout;
usleep_range(500, 1000);
continue;
}
if (ret)
goto out;
} while (ret == -ETIME && timeout);
out:
mutex_unlock(&ctl->lock);
if (ret)
dev_err(adev->dev, "failed to send mode2 reset, error code %d",
ret);
return ret;
}
static const struct pptable_funcs smu_v15_0_8_ppt_funcs = {
.init_allowed_features = smu_v15_0_8_init_allowed_features,
.set_default_dpm_table = smu_v15_0_8_set_default_dpm_table,
@ -450,6 +493,7 @@ static const struct pptable_funcs smu_v15_0_8_ppt_funcs = {
.setup_pptable = smu_v15_0_8_setup_pptable,
.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
.wait_for_event = smu_v15_0_wait_for_event,
.mode2_reset = smu_v15_0_8_mode2_reset,
};
static void smu_v15_0_8_init_msg_ctl(struct smu_context *smu,