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drm/i915/dsi: Move initialization of DSI DSC streams-per-pipe to fill_dsc()
Move the initialization of the DSI DSC streams-per-pipe value to fill_dsc() next to where the corresponding (per-line) slice_count value is initialized. This allows converting the initialization to use the detailed slice configuration state in follow-up changes. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-4-imre.deak@intel.com
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@ -1624,12 +1624,6 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
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if (crtc_state->pipe_bpp < 8 * 3)
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return -EINVAL;
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/* FIXME: split only when necessary */
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if (crtc_state->dsc.slice_count > 1)
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crtc_state->dsc.slice_config.streams_per_pipe = 2;
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else
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crtc_state->dsc.slice_config.streams_per_pipe = 1;
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/* FIXME: initialize from VBT */
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vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;
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@ -3575,10 +3575,14 @@ static void fill_dsc(struct intel_crtc_state *crtc_state,
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* throughput etc. into account.
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*
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* Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
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*
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* FIXME: split only when necessary
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*/
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if (dsc->slices_per_line & BIT(2)) {
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crtc_state->dsc.slice_config.streams_per_pipe = 2;
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crtc_state->dsc.slice_count = 4;
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} else if (dsc->slices_per_line & BIT(1)) {
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crtc_state->dsc.slice_config.streams_per_pipe = 2;
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crtc_state->dsc.slice_count = 2;
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} else {
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/* FIXME */
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@ -3586,6 +3590,7 @@ static void fill_dsc(struct intel_crtc_state *crtc_state,
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drm_dbg_kms(display->drm,
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"VBT: Unsupported DSC slice count for DSI\n");
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crtc_state->dsc.slice_config.streams_per_pipe = 1;
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crtc_state->dsc.slice_count = 1;
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}
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