github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-27 00:22:00 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

drm/i915/dsc: Track the DSC stream count in the DSC slice config state

Browse Source 
Move the tracking for the DSC stream count from
intel_crtc_state::dsc.num_streams to
intel_crtc_state::dsc.slice_config.streams_per_pipe.

While at it add a TODO comment to read out the full DSC configuration
from HW including the pipes-per-line and slices-per-stream values.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260114162232.92731-3-imre.deak@intel.com
This commit is contained in:
Imre Deak 2026-01-14 18:22:19 +02:00
parent 889ff8dd46
commit 2b8f5b5cb2
5 changed files with 12 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/drm/i915/display/icl_dsi.c
View File

@ -1626,9 +1626,9 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
/* FIXME: split only when necessary */
if (crtc_state->dsc.slice_count > 1)
crtc_state->dsc.num_streams = 2;
crtc_state->dsc.slice_config.streams_per_pipe = 2;
else
crtc_state->dsc.num_streams = 1;
crtc_state->dsc.slice_config.streams_per_pipe = 1;
/* FIXME: initialize from VBT */
vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;

2
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -5459,7 +5459,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_I(dsc.config.nsl_bpg_offset);
PIPE_CONF_CHECK_BOOL(dsc.compression_enable);
PIPE_CONF_CHECK_I(dsc.num_streams);
PIPE_CONF_CHECK_I(dsc.slice_config.streams_per_pipe);
PIPE_CONF_CHECK_I(dsc.compressed_bpp_x16);
PIPE_CONF_CHECK_BOOL(splitter.enable);

1
drivers/gpu/drm/i915/display/intel_display_types.h
View File

@ -1332,7 +1332,6 @@ struct intel_crtc_state {
/* Only used for state computation, not read out from the HW. */
bool compression_enabled_on_link;
bool compression_enable;
int num_streams;
struct intel_dsc_slice_config {
int pipes_per_line;
int streams_per_pipe;

6
drivers/gpu/drm/i915/display/intel_dp.c
View File

@ -2418,11 +2418,11 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
*/
if (pipe_config->joiner_pipes && num_joined_pipes == 4 &&
pipe_config->dsc.slice_count == 12)
pipe_config->dsc.num_streams = 3;
pipe_config->dsc.slice_config.streams_per_pipe = 3;
else if (pipe_config->joiner_pipes || pipe_config->dsc.slice_count > 1)
pipe_config->dsc.num_streams = 2;
pipe_config->dsc.slice_config.streams_per_pipe = 2;
else
pipe_config->dsc.num_streams = 1;
pipe_config->dsc.slice_config.streams_per_pipe = 1;
ret = intel_dp_dsc_compute_params(connector, pipe_config);
if (ret < 0) {

11
drivers/gpu/drm/i915/display/intel_vdsc.c
View File

@ -421,7 +421,7 @@ intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
static int intel_dsc_get_vdsc_per_pipe(const struct intel_crtc_state *crtc_state)
{
return crtc_state->dsc.num_streams;
return crtc_state->dsc.slice_config.streams_per_pipe;
}
int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state)
@ -1023,12 +1023,13 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
if (!crtc_state->dsc.compression_enable)
goto out;
/* TODO: Read out slice_config.pipes_per_line/slices_per_stream as well */
if (dss_ctl1 & JOINER_ENABLE && dss_ctl2 & (VDSC2_ENABLE | SMALL_JOINER_CONFIG_3_ENGINES))
crtc_state->dsc.num_streams = 3;
crtc_state->dsc.slice_config.streams_per_pipe = 3;
else if (dss_ctl1 & JOINER_ENABLE && dss_ctl2 & VDSC1_ENABLE)
crtc_state->dsc.num_streams = 2;
crtc_state->dsc.slice_config.streams_per_pipe = 2;
else
crtc_state->dsc.num_streams = 1;
crtc_state->dsc.slice_config.streams_per_pipe = 1;
intel_dsc_get_pps_config(crtc_state);
out:
@ -1042,7 +1043,7 @@ static void intel_vdsc_dump_state(struct drm_printer *p, int indent,
"dsc-dss: compressed-bpp:" FXP_Q4_FMT ", slice-count: %d, num_streams: %d\n",
FXP_Q4_ARGS(crtc_state->dsc.compressed_bpp_x16),
crtc_state->dsc.slice_count,
crtc_state->dsc.num_streams);
crtc_state->dsc.slice_config.streams_per_pipe);
}
void intel_vdsc_state_dump(struct drm_printer *p, int indent,