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arm64: dts: imx8ulp: Add I3C2 controller node

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Add the I3C2 (i3c-master@29360000) node to the imx8ulp device tree using
the Silvaco I3C master IP. Configure PCC3-gated clock with SOSC DIV2 as
parent at 24 MHz for pclk and fast_clk. slow_clk uses a dummy clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Peng Fan 2026-07-20 22:12:10 +08:00 committed by Frank Li
parent e1e3f7582b
commit 5f3301712f
1 changed files with 16 additions and 0 deletions
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16
arch/arm64/boot/dts/freescale/imx8ulp.dtsi
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@ -361,6 +361,22 @@ tpm5: tpm@29340000 {
status = "disabled";
};
i3c2: i3c@29360000 {
compatible = "silvaco,i3c-master-v1";
reg = <0x29360000 0x10000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <3>;
#size-cells = <0>;
clocks = <&pcc3 IMX8ULP_CLK_I3C2>,
<&pcc3 IMX8ULP_CLK_I3C2>,
<&cgc1 IMX8ULP_CLK_DUMMY>;
clock-names = "pclk", "fast_clk", "slow_clk";
assigned-clocks = <&pcc3 IMX8ULP_CLK_I3C2>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SOSC_DIV2>;
assigned-clock-rates = <24000000>;
status = "disabled";
};
lpi2c4: i2c@29370000 {
compatible = "fsl,imx8ulp-lpi2c", "fsl,imx7ulp-lpi2c";
reg = <0x29370000 0x10000>;