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arm64: dts: renesas: r8a779g0: Add CPUIdle support

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Support CPUIdle for ARM Cortex-A76 on R-Car V4H.

Based on patches in the BSP by Tho Vu and Vincent Bryce.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f6d4076983eb45cf23595a045747f28cbdcdf4e6.1668429870.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2022-11-14 13:49:02 +01:00
parent 68c9c53d45
commit 5bb355a8d6
1 changed files with 17 additions and 0 deletions
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17
arch/arm64/boot/dts/renesas/r8a779g0.dtsi
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@ -45,6 +45,7 @@ a76_0: cpu@0 {
power-domains = <&sysc R8A779G0_PD_A1E0D0C0>;
next-level-cache = <&L3_CA76_0>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
};
a76_1: cpu@100 {
@ -54,6 +55,7 @@ a76_1: cpu@100 {
power-domains = <&sysc R8A779G0_PD_A1E0D0C1>;
next-level-cache = <&L3_CA76_0>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
};
a76_2: cpu@10000 {
@ -63,6 +65,7 @@ a76_2: cpu@10000 {
power-domains = <&sysc R8A779G0_PD_A1E0D1C0>;
next-level-cache = <&L3_CA76_1>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
};
a76_3: cpu@10100 {
@ -72,8 +75,22 @@ a76_3: cpu@10100 {
power-domains = <&sysc R8A779G0_PD_A1E0D1C1>;
next-level-cache = <&L3_CA76_1>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
};
idle-states {
entry-method = "psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <400>;
exit-latency-us = <500>;
min-residency-us = <4000>;
};
};
L3_CA76_0: cache-controller-0 {
compatible = "cache";
power-domains = <&sysc R8A779G0_PD_A2E0D0>;