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crytpo: tegra-aes: make aes_handle_req aynschronous
the encrypt/decrypt callbacks have to return with -EINPROGRESS error code and the request complete callback needs to be called from handle_req for aynchronous block ciphers. use work queue to make the driver asynchronous. Change-Id: I0dec1185c31e5de7ba039c39d6bd87c8b3487b2a Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This commit is contained in:
Varun Wadekar
Colin Cross
parent
3fd40dad57
commit
5a5f348ffc
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@ -33,6 +33,7 @@
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#include <linux/interrupt.h>
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#include <linux/completion.h>
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#include <linux/delay.h>
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#include <linux/workqueue.h>
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#include <mach/arb_sema.h>
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#include <mach/clk.h>
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@ -144,8 +145,7 @@ struct tegra_aes_reqctx {
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unsigned long mode;
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};
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#define TEGRA_AES_QUEUE_LENGTH 1
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#define TEGRA_AES_CACHE_SIZE 0
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#define TEGRA_AES_QUEUE_LENGTH 50
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struct tegra_aes_dev {
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struct device *dev;
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@ -197,6 +197,9 @@ static LIST_HEAD(dev_list);
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static DEFINE_SPINLOCK(list_lock);
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static DEFINE_MUTEX(aes_lock);
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static void aes_workqueue_handler(struct work_struct *work);
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static DECLARE_WORK(aes_wq, aes_workqueue_handler);
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extern unsigned long long tegra_chip_uid(void);
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static inline u32 aes_readl(struct tegra_aes_dev *dd, u32 offset)
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@ -350,7 +353,6 @@ static void aes_release_key_slot(struct tegra_aes_dev *dd)
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spin_lock(&list_lock);
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dd->ctx->slot->available = true;
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dd->ctx->slot = NULL;
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dd->ctx = NULL;
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spin_unlock(&list_lock);
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}
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@ -380,6 +382,11 @@ static int aes_set_key(struct tegra_aes_dev *dd)
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int i, eng_busy, icq_empty, dma_busy, ret = 0;
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bool use_ssk = false;
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if (!ctx) {
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dev_err(dd->dev, "%s: context invalid\n", __func__);
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return -EINVAL;
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}
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/* use ssk? */
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if (!dd->ctx->slot) {
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dev_dbg(dd->dev, "using ssk");
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@ -472,10 +479,8 @@ static int tegra_aes_handle_req(struct tegra_aes_dev *dd)
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clear_bit(FLAGS_BUSY, &dd->flags);
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spin_unlock_irqrestore(&dd->lock, flags);
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if (!async_req) {
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dev_err(dd->dev, "no request");
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return 0;
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}
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if (!async_req)
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return -ENODATA;
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if (backlog)
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backlog->complete(backlog, -EINPROGRESS);
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@ -484,6 +489,9 @@ static int tegra_aes_handle_req(struct tegra_aes_dev *dd)
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dev_dbg(dd->dev, "%s: get new req\n", __func__);
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/* take mutex to access the aes hw */
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mutex_lock(&aes_lock);
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/* assign new request to device */
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dd->req = req;
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dd->total = req->nbytes;
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@ -492,6 +500,15 @@ static int tegra_aes_handle_req(struct tegra_aes_dev *dd)
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dd->out_offset = 0;
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dd->out_sg = req->dst;
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in_sg = dd->in_sg;
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out_sg = dd->out_sg;
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if (!in_sg || !out_sg) {
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mutex_unlock(&aes_lock);
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return -EINVAL;
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}
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total = dd->total;
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rctx = ablkcipher_request_ctx(req);
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ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
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rctx->mode &= FLAGS_MODE_MASK;
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@ -512,9 +529,6 @@ static int tegra_aes_handle_req(struct tegra_aes_dev *dd)
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ctx->flags |= FLAGS_NEW_KEY;
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}
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/* take mutex to access the aes hw */
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mutex_lock(&aes_lock);
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/* take the hardware semaphore */
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if (tegra_arb_mutex_lock_timeout(dd->res_id, ARB_SEMA_TIMEOUT) < 0) {
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dev_err(dd->dev, "aes hardware not available\n");
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@ -522,15 +536,17 @@ static int tegra_aes_handle_req(struct tegra_aes_dev *dd)
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return -EBUSY;
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}
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total = dd->total;
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in_sg = dd->in_sg;
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out_sg = dd->out_sg;
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aes_set_key(dd);
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/* set iv to the aes hw slot */
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memset(dd->buf_in, 0 , AES_BLOCK_SIZE);
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memcpy(dd->buf_in, dd->iv, dd->ivlen);
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ret = copy_from_user((void *)dd->buf_in, (void __user *)dd->iv,
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dd->ivlen);
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if (ret < 0) {
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dev_err(dd->dev, "copy_from_user fail(%d)\n", ret);
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goto out;
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}
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ret = aes_start_crypt(dd, (u32)dd->dma_buf_in,
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(u32)dd->dma_buf_out, 1, FLAGS_CBC, false);
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if (ret < 0) {
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@ -586,45 +602,16 @@ static int tegra_aes_handle_req(struct tegra_aes_dev *dd)
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/* release the hardware semaphore */
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tegra_arb_mutex_unlock(dd->res_id);
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dd->total = total;
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/* release the mutex */
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mutex_unlock(&aes_lock);
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dd->total = total;
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if (!dd->total) {
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clear_bit(FLAGS_BUSY, &dd->flags);
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aes_release_key_slot(dd);
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}
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dev_dbg(dd->dev, "exit\n");
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return ret;
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}
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static int tegra_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
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{
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struct tegra_aes_reqctx *rctx = ablkcipher_request_ctx(req);
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struct tegra_aes_dev *dd = aes_dev;
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unsigned long flags;
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int err = 0;
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dev_dbg(dd->dev, "nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
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!!(mode & FLAGS_ENCRYPT),
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!!(mode & FLAGS_CBC));
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rctx->mode = mode;
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spin_lock_irqsave(&dd->lock, flags);
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err = ablkcipher_enqueue_request(&dd->queue, req);
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spin_unlock_irqrestore(&dd->lock, flags);
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if (!test_and_set_bit(FLAGS_BUSY, &dd->flags))
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err = tegra_aes_handle_req(dd);
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else
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err = -EBUSY;
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if (dd->req->base.complete)
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dd->req->base.complete(&dd->req->base, err);
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dd->req->base.complete(&dd->req->base, ret);
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return err;
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dev_dbg(dd->dev, "%s: exit\n", __func__);
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return ret;
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}
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static int tegra_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
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@ -648,15 +635,18 @@ static int tegra_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
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dev_dbg(dd->dev, "keylen: %d\n", keylen);
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ctx->dd = dd;
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dd->ctx = ctx;
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if (ctx->slot)
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aes_release_key_slot(dd);
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key_slot = aes_find_key_slot(dd);
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if (!key_slot) {
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dev_err(dd->dev, "no empty slot\n");
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return -ENOMEM;
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}
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ctx->dd = dd;
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dd->ctx = ctx;
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ctx->slot = key_slot;
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ctx->keylen = keylen;
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ctx->flags |= FLAGS_NEW_KEY;
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@ -669,6 +659,55 @@ static int tegra_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
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return 0;
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}
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static void aes_workqueue_handler(struct work_struct *work)
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{
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struct tegra_aes_dev *dd = aes_dev;
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int ret;
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set_bit(FLAGS_BUSY, &dd->flags);
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do {
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ret = tegra_aes_handle_req(dd);
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} while (!ret);
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}
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static irqreturn_t aes_irq(int irq, void *dev_id)
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{
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struct tegra_aes_dev *dd = (struct tegra_aes_dev *)dev_id;
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u32 value = aes_readl(dd, INTR_STATUS);
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dev_dbg(dd->dev, "irq_stat: 0x%x", value);
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if (!((value & ENGINE_BUSY_FIELD) & !(value & ICQ_EMPTY_FIELD)))
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complete(&dd->op_complete);
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return IRQ_HANDLED;
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}
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static int tegra_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
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{
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struct tegra_aes_reqctx *rctx = ablkcipher_request_ctx(req);
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struct tegra_aes_dev *dd = aes_dev;
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unsigned long flags;
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int err = 0;
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int busy;
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dev_dbg(dd->dev, "nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
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!!(mode & FLAGS_ENCRYPT),
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!!(mode & FLAGS_CBC));
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rctx->mode = mode;
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spin_lock_irqsave(&dd->lock, flags);
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err = ablkcipher_enqueue_request(&dd->queue, req);
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busy = test_and_set_bit(FLAGS_BUSY, &dd->flags);
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spin_unlock_irqrestore(&dd->lock, flags);
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if (!busy)
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schedule_work(&aes_wq);
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return err;
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}
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static int tegra_aes_ecb_encrypt(struct ablkcipher_request *req)
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{
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return tegra_aes_crypt(req, FLAGS_ENCRYPT);
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@ -893,18 +932,6 @@ static struct crypto_alg algs[] = {
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}
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};
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static irqreturn_t aes_irq(int irq, void *dev_id)
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{
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struct tegra_aes_dev *dd = (struct tegra_aes_dev *)dev_id;
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u32 value = aes_readl(dd, INTR_STATUS);
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dev_dbg(dd->dev, "irq_stat: 0x%x", value);
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if (!((value & ENGINE_BUSY_FIELD) & !(value & ICQ_EMPTY_FIELD)))
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complete(&dd->op_complete);
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return IRQ_HANDLED;
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}
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static int tegra_aes_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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@ -1067,6 +1094,7 @@ static int __devexit tegra_aes_remove(struct platform_device *pdev)
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if (!dd)
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return -ENODEV;
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cancel_work_sync(&aes_wq);
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free_irq(INT_VDE_BSE_V, dd);
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spin_lock(&list_lock);
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list_del(&dev_list);
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