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pci-v7.2-fixes-1
-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmpsv30UHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vx05BAAlX0ggF2vDuKKQK1Q67oBANG+ANZq wAyMibleGWHvUfknsxcioGoXr+oZrI2fbuvaz1id2Tlx3vByfYiSihrNz4BrDbny H+YD2Mqhz0aaanb+G1WEqRndCyRLtYmsr0cUAp7giBh22t43tgdIBvKr2PsCsKCo WiEUP/QvxYuiJ73g6s7RqbwIYSzk/9MMSDhoO83c/gRZcY/r47KY19ysLevQ/176 h0xC73EV6UF0dqe485jt24/zzYkN70zV3FscPMLkU7s0Fd2jzRm/zktS7tbLTUg2 PZwqCnHc4dytoqEmcycrQHGNiPRQCCOnqcsSlWcMzPPBdYCR1EUictiYXgq0Bd4T EvvjHHl3/9IVCWgkz7rKmLz8V7GWoJSH11Ykh3AWWc7roFsTn1UH2YY+85/Asfv+ /vuo2G7zskKE5WOSaEOLBvYi84FRge3FxA3XPgMYTOePTqIpjjJ6eglZRmxEhid5 IrJhaB0O9kNuRR3Nu85lgHqL35Pp5AUVOLqyXELvcbBBJHtm1PTgjAZjyRIm0Rn7 YINhuQr3gw+3vKaXGB8qHqXMG1/hdMkHH9t6LEqAqFtRrTZjzquGg5oFnJOYINCL VinNH6/G1qIYBThTVDMeVSTUqCbkz97eedzyGo92oqpUdhseWyaaV4vwW1ss4DWv QSN25brLKheYiKk= =YyK4 -----END PGP SIGNATURE----- Merge tag 'pci-v7.2-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull pci fixes from Bjorn Helgaas: - Remove Karthikeyan Mitran from Mobiveil MAINTAINERS PCIe entry since email bounces (Manivannan Sadhasivam) - Preserve i.MX6Q, i.MX6QP, and i.MX6SX Root Port MSI/MSI-X Capabilities when using iMSI-RX to work around hardware defect (Soeren Moch) - Reorder i.MX6Q/DL PHY power up to fix boot hang regression (Richard Zhu) * tag 'pci-v7.2-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: PCI: imx6: Fix i.MX6Q/DL boot hang caused by improper PHY power sequencing PCI: imx6: Keep i.MX6 Root Port MSI/MSI-X Capabilities with iMSI-RX to work around hardware bug MAINTAINERS: Drop Karthikeyan Mitran from Mobiveil PCIe entry
This commit is contained in:
commit
596254ecc5
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@ -20692,7 +20692,6 @@ F: include/linux/switchtec.h
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F: include/uapi/linux/switchtec_ioctl.h
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PCI DRIVER FOR MOBIVEIL PCIE IP
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M: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
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M: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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L: linux-pci@vger.kernel.org
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S: Supported
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@ -680,21 +680,12 @@ static int imx_pcie_attach_pd(struct device *dev)
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static int imx6q_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)
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{
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if (enable) {
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/* power up core phy and enable ref clock */
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regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD);
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/*
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* The async reset input need ref clock to sync internally,
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* when the ref clock comes after reset, internal synced
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* reset time is too short, cannot meet the requirement.
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* Add a ~10us delay here.
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*/
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usleep_range(10, 100);
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regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN);
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} else {
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regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN);
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regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD);
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}
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if (enable)
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regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
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IMX6Q_GPR1_PCIE_REF_CLK_EN);
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else
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regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
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IMX6Q_GPR1_PCIE_REF_CLK_EN);
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return 0;
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}
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@ -825,8 +816,16 @@ static int imx6sx_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
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static int imx6qp_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
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{
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if (assert)
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regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
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IMX6Q_GPR1_PCIE_TEST_PD);
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else
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regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
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IMX6Q_GPR1_PCIE_TEST_PD);
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regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_SW_RST,
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assert ? IMX6Q_GPR1_PCIE_SW_RST : 0);
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if (!assert)
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usleep_range(200, 500);
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@ -835,11 +834,15 @@ static int imx6qp_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
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static int imx6q_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
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{
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if (!assert)
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return 0;
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if (assert)
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regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
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IMX6Q_GPR1_PCIE_TEST_PD);
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else
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regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
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IMX6Q_GPR1_PCIE_TEST_PD);
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regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD);
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regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN);
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if (!assert)
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usleep_range(200, 500);
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return 0;
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}
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@ -1445,6 +1448,7 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
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return 0;
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err_phy_off:
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imx_pcie_assert_core_reset(imx_pcie);
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phy_power_off(imx_pcie->phy);
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err_phy_exit:
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phy_exit(imx_pcie->phy);
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@ -1466,6 +1470,7 @@ static void imx_pcie_host_exit(struct dw_pcie_rp *pp)
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struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
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struct imx_pcie *imx_pcie = to_imx_pcie(pci);
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imx_pcie_assert_core_reset(imx_pcie);
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if (imx_pcie->phy) {
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if (phy_power_off(imx_pcie->phy))
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dev_err(pci->dev, "unable to power off PHY\n");
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@ -1995,7 +2000,8 @@ static const struct imx_pcie_drvdata drvdata[] = {
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.flags = IMX_PCIE_FLAG_IMX_PHY |
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IMX_PCIE_FLAG_SPEED_CHANGE_WORKAROUND |
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IMX_PCIE_FLAG_BROKEN_SUSPEND |
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IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
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IMX_PCIE_FLAG_SUPPORTS_SUSPEND |
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IMX_PCIE_FLAG_KEEP_MSI_CAP,
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.dbi_length = 0x200,
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.gpr = "fsl,imx6q-iomuxc-gpr",
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.ltssm_off = IOMUXC_GPR12,
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@ -2011,7 +2017,8 @@ static const struct imx_pcie_drvdata drvdata[] = {
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.flags = IMX_PCIE_FLAG_IMX_PHY |
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IMX_PCIE_FLAG_SPEED_CHANGE_WORKAROUND |
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IMX_PCIE_FLAG_SKIP_L23_READY |
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IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
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IMX_PCIE_FLAG_SUPPORTS_SUSPEND |
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IMX_PCIE_FLAG_KEEP_MSI_CAP,
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.gpr = "fsl,imx6q-iomuxc-gpr",
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.ltssm_off = IOMUXC_GPR12,
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.ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2,
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@ -2026,7 +2033,8 @@ static const struct imx_pcie_drvdata drvdata[] = {
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.flags = IMX_PCIE_FLAG_IMX_PHY |
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IMX_PCIE_FLAG_SPEED_CHANGE_WORKAROUND |
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IMX_PCIE_FLAG_SKIP_L23_READY |
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IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
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IMX_PCIE_FLAG_SUPPORTS_SUSPEND |
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IMX_PCIE_FLAG_KEEP_MSI_CAP,
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.dbi_length = 0x200,
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.gpr = "fsl,imx6q-iomuxc-gpr",
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.ltssm_off = IOMUXC_GPR12,
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