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drm/amdgpu: validate rptr and wptr of a userq
rptr and wptr of a userq are 8 bytes aligned, and may
not placed on a page boundary.
This commit checks whether rptr and wptr are 8 bytes
aligned, and expectes 8 bytes when validates rptr/wptr VA.
With above changes, this commit fixes an regression
in amdgpu_userq_input_va_validate, where
end_addr is caculated by:
check_add_overflow(start_addr, expected_size - 1, &end_addr).
Wptr and rptr are very likely not to be page aligned,
when validating rptr and wptr, if they are located in the last
mapped page(or only one page is mapped)
and expected_size is PAGE_SIZE, end_addr will exceed the last
mapped page, means (end_addr >> AMDGPU_GPU_PAGE_SHIFT) > va_map->last,
and causing an -EINVAL, even it is a valid VA.
Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Fixes: c0122bf2cc ("drm/amdgpu: fix userq VA validation for sub-page buffers")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
48dc279c30
commit
556488b086
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@ -702,10 +702,10 @@ amdgpu_userq_create(struct drm_file *filp, union drm_amdgpu_userq *args)
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args->in.queue_size,
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&queue->userq_vas.va.queue_rb) ||
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amdgpu_userq_input_va_validate(adev, queue, args->in.rptr_va,
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AMDGPU_GPU_PAGE_SIZE,
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sizeof(u64),
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&queue->userq_vas.va.rptr) ||
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amdgpu_userq_input_va_validate(adev, queue, args->in.wptr_va,
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AMDGPU_GPU_PAGE_SIZE,
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sizeof(u64),
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&queue->userq_vas.va.wptr)) {
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r = -EINVAL;
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amdgpu_bo_unreserve(fpriv->vm.root.bo);
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@ -850,6 +850,12 @@ static int amdgpu_userq_input_args_validate(struct drm_device *dev,
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drm_file_err(filp, "invalidate userq queue rptr or wptr\n");
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return -EINVAL;
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}
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if (!IS_ALIGNED(args->in.wptr_va, sizeof(u64)) ||
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!IS_ALIGNED(args->in.rptr_va, sizeof(u64))) {
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drm_file_err(filp, "user queue rptr or wptr is not 8-byte aligned\n");
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return -EINVAL;
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}
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break;
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case AMDGPU_USERQ_OP_FREE:
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if (args->in.ip_type ||
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