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clk: rockchip: rv1106: remove the mclk_acodec_rx

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Dues to the broken doc, there is no path of
mclk_i2s0_rx to mclk_acodec_rx, we need to
remove it directly and let mclk_acodec_tx
below to the mclk_i2s0_8ch_tx.

- Before:
          clk_i2s0_8ch_rx_src         1        1        0   594000000          0     0  50000
             clk_i2s0_8ch_rx_frac       1        1        0    12288000          0     0  50000
                clk_i2s0_8ch_rx       1        1        0    12288000          0     0  50000
                   mclk_i2s0_8ch_rx       2        2        0    12288000          0     0  50000
                      mclk_acodec_rx       1        1        0    12288000          0     0  50000
          clk_i2s0_8ch_tx_src         1        1        0   594000000          0     0  50000
             clk_i2s0_8ch_tx_frac       1        1        0    12288000          0     0  50000
                clk_i2s0_8ch_tx       1        1        0    12288000          0     0  50000
                   mclk_i2s0_8ch_tx       2        2        0    12288000          0     0  50000
                      mclk_acodec_tx       1        1        0    12288000          0     0  50000

- After:
          clk_i2s0_8ch_rx_src         1        1        0   594000000          0     0  50000
             clk_i2s0_8ch_rx_frac       1        1        0    12288000          0     0  50000
                clk_i2s0_8ch_rx       1        1        0    12288000          0     0  50000
                   mclk_i2s0_8ch_rx       1        1        0    12288000          0     0  50000
          clk_i2s0_8ch_tx_src         1        1        0   594000000          0     0  50000
             clk_i2s0_8ch_tx_frac       1        1        0    12288000          0     0  50000
                clk_i2s0_8ch_tx       1        1        0    12288000          0     0  50000
                   mclk_i2s0_8ch_tx       2        2        0    12288000          0     0  50000
                      mclk_sai        0        0        0    12288000          0     0  50000
                      mclk_dsm        0        0        0    12288000          0     0  50000
                      mclk_acodec_tx       1        1        0    12288000          0     0  50000

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: I223189b6852f2e796eeb01ad4ce957fde7f9a52c
This commit is contained in:
Xing Zheng 2022-03-26 10:19:31 +08:00 committed by Tao Huang
parent 2547122058
commit 54a7a1cc01
2 changed files with 0 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/clk/rockchip/clk-rv1106.c
View File

@ -480,9 +480,6 @@ static struct rockchip_clk_branch rv1106_clk_branches[] __initdata = {
COMPOSITE_NOMUX(MCLK_ACODEC_TX, "mclk_acodec_tx", "mclk_i2s0_8ch_tx", 0,
RV1106_PERICLKSEL_CON(8), 0, 8, DFLAGS,
RV1106_PERICLKGATE_CON(6), 4, GFLAGS),
COMPOSITE_NOMUX(MCLK_ACODEC_RX, "mclk_acodec_rx", "mclk_i2s0_8ch_rx", 0,
RV1106_PERICLKSEL_CON(8), 8, 8, DFLAGS,
RV1106_PERICLKGATE_CON(6), 5, GFLAGS),
COMPOSITE_NODIV(CLK_CORE_CRYPTO, "clk_core_crypto", mux_300m_200m_100m_24m_p, 0,
RV1106_PERICLKSEL_CON(6), 5, 2, MFLAGS,
RV1106_PERICLKGATE_CON(3), 11, GFLAGS),

1
include/dt-bindings/clock/rv1106-cru.h
View File

@ -30,7 +30,6 @@
#define ACLK_RKNN 23
#define PCLK_ACODEC 24
#define MCLK_ACODEC_TX 25
#define MCLK_ACODEC_RX 26
#define CLK_CORE_CRYPTO 27
#define CLK_PKA_CRYPTO 28
#define ACLK_CRYPTO 29